US5789304A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of forming a capacitor
Assignee: Micron Technology Inc
•
Filing: 1996-10-31
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Granted: 1998-08-04
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Expires: 2016-10-31
Abstract
Abstract A semiconductor processing method of forming a stacked container capacitor includes, a) providing a pair of spaced conductive runners relative to a substrate, the conductive runners respectively having electrically insulative sidewall spacers and an electrically insulative cap, the caps having respective outer surfaces; b) providing a node between the runners to which electrical connection to a capacitor is to be made; c) providing an electrically conductive pillar in electrical connection with the node, the pillar projecting outwardly relative to the node between the runners and having a first outer surface positioned outwardly of both runner caps, the pillar completely filling the space between the pair of runners at the location where the pillar is located; d) providing an insulating dielectric layer outwardly of the caps and the conductive pillar; e) etching a container opening through the insulating dielectric layer to outwardly expose the conductive pillar first outer surface; f) etching the exposed conductive pillar to define a pillar second outer surface which is closer to the node than the pillar first outer surface and to deepen the container opening; g) providing an electrically conductive storage node container layer within the container opening over the second outer conductive pillar surface; h) providing a capacitor dielectric layer over the capacitor storage node layer; and i) providing an electrically conductive outer capacitor plate over the capacitor dielectric layer. Such a capacitor construction is also disclosed.
Inventors
- 👤 Mark Fischer
- 👤 Mark Jost
- 👤 Kunal Parekh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 20:20
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10D; H10D1/00; H10D1/60; H10D1/68; Y; Y10; Y10S; Y10S148/00; Y10S148/02
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
163 words
A semiconductor processing method of forming a stacked container capacitor comprising the following steps: providing a node on a substrate to which electrical connection to a capacitor is to be made; providing an electrically conductive pillar in electrical connection with the node, the pillar projecting outwardly relative to the node and having a first outer surface; providing an insulating dielectric layer over the conductive pillar; etching a container opening through the insulating dielectric layer to outwardly expose only a portion of the conductive pillar first outer surface; etching the exposed portion of the conductive pillar to define a pillar second outer surface which is closer to the node than the pillar first outer surface and to deepen the container opening; providing an electrically conductive storage node container layer within the container opening over the second outer conductive pillar surface; providing a capacitor dielectric layer over the capacitor storage node layer; and providing an electrically conductive outer capacitor plate over the capacitor dielectric layer.
Claim 2
Dependent Claim
163 words
A semiconductor processing method of forming a stacked container capacitor comprising the following steps: providing a node on a substrate to which electrical connection to a capacitor is to be made; providing an electrically conductive pillar in electrical connection with the node, the pillar projecting outwardly relative to the node and having a first outer surface; providing an insulating dielectric layer over the conductive pillar; etching a container opening through the insulating dielectric layer to outwardly expose only a portion of the conductive pillar first outer surface; etching the exposed portion of the conductive pillar to define a pillar second outer surface which is closer to the node than the pillar first outer surface and to deepen the container opening; providing an electrically conductive storage node container layer within the container opening over the second outer conductive pillar surface; providing a capacitor dielectric layer over the capacitor storage node layer; and providing an electrically conductive outer capacitor plate over the capacitor dielectric layer.
Claim 3
Dependent Claim
48 words
The semiconductor processing method of forming a stacked container capacitor of claim 1 wherein the conductive pillar first outer surface has a first cross-sectional area and the conductive pillar second outer surface has a second cross-sectional area, the second cross-sectional area being less than the first cross-sectional area.
Claim 4
Dependent Claim
61 words
The semiconductor processing method of forming a stacked container capacitor of claim 1 wherein the conductive pillar first outer surface has a first cross-sectional area and the container opening has a cross-sectional area relative to the insulating dielectric layer, the first cross-sectional area being misaligned and overlapping with the container opening cross-sectional area, the pillar etching step comprising an anisotropic etch.
Claim 5
Dependent Claim
94 words
The semiconductor processing method of forming a stacked container capacitor of claim 1 wherein the conductive pillar first outer surface has a first cross-sectional area and the container opening has a cross-sectional area relative to the insulating dielectric layer, the first cross-sectional area being misaligned and overlapping with the container opening cross-sectional area, the pillar etching step comprising isotopically etching the pillar to provide at least one lateral recess relative to the container opening; the electrically conductive storage node layer, the capacitor dielectric layer and the outer capacitor plate collectively filling the lateral recess.
Claim 6
Dependent Claim
44 words
The semiconductor processing method of forming a stacked container capacitor of claim 1 wherein the conductive pillar comprises an initial thickness prior to etching and the step of etching the conductive pillar comprises removing at least 50% of the initial thickness of the pillar.
Claim 7
Dependent Claim
21 words
The semiconductor processing method of forming a stacked container capacitor of claim 1 wherein the conductive pillar comprises conductively doped polysilicon.
Claim 8
Dependent Claim
211 words
A semiconductor processing method of forming a stacked container capacitor comprising the following steps: providing a pair of spaced conductive runners relative to a substrate; providing a node between the runners to which electrical connection to a capacitor is to be made; providing an electrically conductive pillar in electrical connection with the node, the pillar projecting outwardly relative to the node between the runners and having a first outer surface positioned outwardly of the pair of runners, the pillar completely filling the space between the pair of runners at the location where the pillar is located; providing an insulating dielectric layer over the pair of spaced conductive runners and the conductive pillar; etching a container opening through the insulating dielectric layer to outwardly expose only a portion of the conductive pillar first outer surface; etching the exposed conductive portion of the conductive pillar to define a pillar second outer surface which is closer to the node than the pillar first outer surface and to deepen the container opening; providing an electrically conductive storage node container layer within the container opening over the second outer conductive pillar surface; providing a capacitor dielectric layer over the capacitor storage node layer; and providing an electrically conductive outer capacitor plate over the capacitor dielectric layer.
Claim 9
Dependent Claim
211 words
A semiconductor processing method of forming a stacked container capacitor comprising the following steps: providing a pair of spaced conductive runners relative to a substrate; providing a node between the runners to which electrical connection to a capacitor is to be made; providing an electrically conductive pillar in electrical connection with the node, the pillar projecting outwardly relative to the node between the runners and having a first outer surface positioned outwardly of the pair of runners, the pillar completely filling the space between the pair of runners at the location where the pillar is located; providing an insulating dielectric layer over the pair of spaced conductive runners and the conductive pillar; etching a container opening through the insulating dielectric layer to outwardly expose only a portion of the conductive pillar first outer surface; etching the exposed conductive portion of the conductive pillar to define a pillar second outer surface which is closer to the node than the pillar first outer surface and to deepen the container opening; providing an electrically conductive storage node container layer within the container opening over the second outer conductive pillar surface; providing a capacitor dielectric layer over the capacitor storage node layer; and providing an electrically conductive outer capacitor plate over the capacitor dielectric layer.
Claim 10
Dependent Claim
48 words
The semiconductor processing method of forming a stacked container capacitor of claim 7 wherein the conductive pillar first outer surface has a first cross-sectional area and the conductive pillar second outer surface has a second cross-sectional area, the second cross-sectional area being less than the first cross-sectional area.
Claim 11
Dependent Claim
61 words
The semiconductor processing method of forming a stacked container capacitor of claim 7 wherein the conductive pillar first outer surface has a first cross-sectional area and the container opening has a cross-sectional area relative to the insulating dielectric layer, the first cross-sectional area being misaligned and overlapping with the container opening cross-sectional area, the pillar etching step comprising an anisotropic etch.
Claim 12
Dependent Claim
94 words
The semiconductor processing method of forming a stacked container capacitor of claim 7 wherein the conductive pillar first outer surface has a first cross-sectional area and the container opening has a cross-sectional area relative to the insulating dielectric layer, the first cross-sectional area being misaligned and overlapping with the container opening cross-sectional area, the pillar etching step comprising isotopically etching the pillar to provide at least one lateral recess relative to the container opening; the electrically conductive storage node layer, the capacitor dielectric layer and the outer capacitor plate collectively filling the lateral recess.
Claim 13
Dependent Claim
44 words
The semiconductor processing method of forming a stacked container capacitor of claim 7 wherein the conductive pillar comprises an initial thickness prior to etching and the step of etching the conductive pillar comprises removing at least 50% of the initial thickness of the pillar.
Claim 14
Dependent Claim
21 words
The semiconductor processing method of forming a stacked container capacitor of claim 7 wherein the conductive pillar comprises conductively doped polysilicon.
Claim 15
Dependent Claim
226 words
A semiconductor processing method of forming a stacked container capacitor comprising the following steps: providing a pair of spaced conductive runners relative to a substrate, the conductive runners respectively having electrically insulative sidewall spacers and an electrically insulative cap, the caps having respective outer surfaces; providing a node between the runners to which electrical connection to a capacitor is to be made; providing an electrically conductive pillar in electrical connection with the node, the pillar projecting outwardly relative to the node between the runners and having a first outer surface positioned outwardly of both runner caps, the pillar completely filling the space between the pair of runners at the location where the pillar is located; providing an insulating dielectric layer outwardly of the caps and the conductive pillar; etching a container opening through the insulating dielectric layer to outwardly expose only a portion of the conductive pillar first outer surface; etching the exposed portion of the conductive pillar to define a pillar second outer surface which is closer to the node than the pillar first outer surface and to deepen the container opening; providing an electrically conductive storage node container layer within the container opening over the second outer conductive pillar surface; providing a capacitor dielectric layer over the capacitor storage node layer; and providing an electrically conductive outer capacitor plate over the capacitor dielectric layer.
Claim 16
Dependent Claim
226 words
A semiconductor processing method of forming a stacked container capacitor comprising the following steps: providing a pair of spaced conductive runners relative to a substrate, the conductive runners respectively having electrically insulative sidewall spacers and an electrically insulative cap, the caps having respective outer surfaces; providing a node between the runners to which electrical connection to a capacitor is to be made; providing an electrically conductive pillar in electrical connection with the node, the pillar projecting outwardly relative to the node between the runners and having a first outer surface positioned outwardly of both runner caps, the pillar completely filling the space between the pair of runners at the location where the pillar is located; providing an insulating dielectric layer outwardly of the caps and the conductive pillar; etching a container opening through the insulating dielectric layer to outwardly expose only a portion of the conductive pillar first outer surface; etching the exposed portion of the conductive pillar to define a pillar second outer surface which is closer to the node than the pillar first outer surface and to deepen the container opening; providing an electrically conductive storage node container layer within the container opening over the second outer conductive pillar surface; providing a capacitor dielectric layer over the capacitor storage node layer; and providing an electrically conductive outer capacitor plate over the capacitor dielectric layer.
Claim 17
Dependent Claim
48 words
The semiconductor processing method of forming a stacked container capacitor of claim 13 wherein the conductive pillar first outer surface has a first cross-sectional area and the conductive pillar second outer surface has a second cross-sectional area, the second cross-sectional area being less than the first cross-sectional area.
Claim 18
Dependent Claim
61 words
The semiconductor processing method of forming a stacked container capacitor of claim 13 wherein the conductive pillar first outer surface has a first cross-sectional area and the container opening has a cross-sectional area relative to the insulating dielectric layer, the first cross-sectional area being misaligned and overlapping with the container opening cross-sectional area, the pillar etching step comprising an anisotropic etch.
Claim 19
Dependent Claim
94 words
The semiconductor processing method of forming a stacked container capacitor of claim 13 wherein the conductive pillar first outer surface has a first cross-sectional area and the container opening has a cross-sectional area relative to the insulating dielectric layer, the first cross-sectional area being misaligned and overlapping with the container opening cross-sectional area, the pillar etching step comprising isotopically etching the pillar to provide at least one lateral recess relative to the container opening; the electrically conductive storage node layer, the capacitor dielectric layer and the outer capacitor plate collectively filling the lateral recess.
Claim 20
Dependent Claim
44 words
The semiconductor processing method of forming a stacked container capacitor of claim 13 wherein the conductive pillar comprises an initial thickness prior to etching and the step of etching the conductive pillar comprises removing at least 50% of the initial thickness of the pillar.
Claim 21
Dependent Claim
21 words
The semiconductor processing method of forming a stacked container capacitor of claim 13 wherein the conductive pillar comprises conductively doped polysilicon.
Claim 22
Dependent Claim
32 words
The semiconductor processing method of forming a stacked container capacitor of claim 13 wherein the pillar etching step defines the pillar second outer surface to be elevationally inward of both runner caps.
Claim 23
Dependent Claim
41 words
The semiconductor processing method of forming a stacked container capacitor of claim 13 wherein the conductive runners have outer conductive surfaces, the pillar etching step defining the pillar second outer surface to be elevationally inward of both runner outer conductive surfaces.
Claim 24
Dependent Claim
99 words
A semiconductor processing method of forming a capacitor, comprising the following steps: forming an electrically conductive pillar over a substrate, the pillar having an outer surface; forming an insulating dielectric layer over the conductive pillar; removing a portion of the insulating dielectric layer to form an opening through the insulating dielectric layer and down to at least the conductive pillar outer surface; removing a portion of the conductive pillar; forming a storage node layer within the opening; forming a capacitor dielectric layer over the capacitor storage node layer; and forming an outer capacitor plate over the capacitor dielectric layer.
Claim 25
Dependent Claim
99 words
A semiconductor processing method of forming a capacitor, comprising the following steps: forming an electrically conductive pillar over a substrate, the pillar having an outer surface; forming an insulating dielectric layer over the conductive pillar; removing a portion of the insulating dielectric layer to form an opening through the insulating dielectric layer and down to at least the conductive pillar outer surface; removing a portion of the conductive pillar; forming a storage node layer within the opening; forming a capacitor dielectric layer over the capacitor storage node layer; and forming an outer capacitor plate over the capacitor dielectric layer.
Claim 26
Dependent Claim
12 words
The method of claim 21 wherein the steps occur sequentially as written.
Claim 27
Dependent Claim
124 words
A semiconductor processing method of forming a capacitor, comprising the following steps: forming an electrically conductive pillar supported by a substrate and having a first outer surface; forming an insulating dielectric layer over the conductive pillar; removing a portion of the insulating dielectric layer to form an opening in the insulating dielectric layer and to expose the conductive pillar first outer surface within the opening; removing a portion of the exposed conductive pillar to define a conductive pillar second outer surface which is closer to the substrate than the conductive pillar first outer surface; forming a storage node layer within the opening; forming a capacitor dielectric layer over the capacitor storage node layer; and forming an outer capacitor plate over the capacitor dielectric layer.
Claim 28
Dependent Claim
124 words
A semiconductor processing method of forming a capacitor, comprising the following steps: forming an electrically conductive pillar supported by a substrate and having a first outer surface; forming an insulating dielectric layer over the conductive pillar; removing a portion of the insulating dielectric layer to form an opening in the insulating dielectric layer and to expose the conductive pillar first outer surface within the opening; removing a portion of the exposed conductive pillar to define a conductive pillar second outer surface which is closer to the substrate than the conductive pillar first outer surface; forming a storage node layer within the opening; forming a capacitor dielectric layer over the capacitor storage node layer; and forming an outer capacitor plate over the capacitor dielectric layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-08-03 | 2002-02-02 | 2002-08-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-08-03 | 2006-02-02 | 2006-08-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-08-03 | 2010-02-02 | 2010-08-04 | $7700.00 | Window Closed / Lapsed |