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US5158905A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacturing a semiconductor device with villus-type capacitor

Assignee: Samsung Electronics Co Ltd
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Filing: 1991-06-14
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Granted: 1992-10-27
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Expires: 2011-06-14
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Abstract

Abstract A method for manufacturing a villus-type capacitor of a semiconductor memory device formed by stacking a storage electrode, a dielectric film and a plate electrode on a semiconductor substrate further comprising the steps of forming a first conductive layer by depositing a conductive material on the semiconductor substrate; covering the first conductive layer with a second material having grains of a first material; selectively removing the second material using the grains of the first material as a mask; etching a predetermined portion of the first conductive layer using a grain pattern formed by removing the second material as a mask; removing the grain pattern; completing the formation of a storage electrode by defining into each unit cell the villus-formed first conductive layers on the surface of the device utillizing an etching process; forming the dielectric film over the surface of the storage electrode; and forming the plate electrode by depositing a second conductive layer over the dielectric film. The pillar-shaped storage electrode having dimensions below design rules and a buried bit line extend the capacitor's surface, resulting in an effective increase of capacitive area, and a corresponding increase in the cell capacitance.

Inventors

  • 👤 Ji-hong Ahn

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 14:18
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10B12/30; H10B12/31; H10B12/318; H10D; H10D1/00; H10D1/01; H10D1/041; H10D1/043; H10D1/60; H10D1/68; H10D1/692; H10D1/711; H10D1/712; H10D1/716; H10P; H10P50/00; H10P50/71

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 155 words
A method for manufacturing a semiconductor memory device with a capacitor by stacking a storage electrode, a dielectric film and a plate electrode on a semiconductor substrate, said method further comprising the steps of: forming a first conductive layer by depositing a conductive material on said semiconductor substrate; covering the first conductive layer with a glass material which includes grains of an oxide; selectively removing said glass material using said oxide material grains as a mask; etching said first conductive layer using a grain pattern formed by removing said glass material as a mask; removing said grain pattern; completing the formation of a storage electrode by defining said first conductive layers formed as villi on the surface of the resultant structure into each unit cell utilizing an etching process; forming said dielectric film over the surface of said storage electrode; and forming said plate electrode by depositing a second conductive layer over said dielectric film.
Claim 2
Independent Claim 155 words
A method for manufacturing a semiconductor memory device with a capacitor by stacking a storage electrode, a dielectric film and a plate electrode on a semiconductor substrate, said method further comprising the steps of: forming a first conductive layer by depositing a conductive material on said semiconductor substrate; covering the first conductive layer with a glass material which includes grains of an oxide; selectively removing said glass material using said oxide material grains as a mask; etching said first conductive layer using a grain pattern formed by removing said glass material as a mask; removing said grain pattern; completing the formation of a storage electrode by defining said first conductive layers formed as villi on the surface of the resultant structure into each unit cell utilizing an etching process; forming said dielectric film over the surface of said storage electrode; and forming said plate electrode by depositing a second conductive layer over said dielectric film.
Claim 3
Dependent Claim 35 words
A method for manufacturing a semiconductor memory device with a capacitor as claimed in claim 1, wherein said oxide is either one of the group consisting of SiO 2 and Al 2 O 3 .
Claim 4
Dependent Claim 25 words
A method for manufacturing a semiconductor memory device with a capacitor as claimed in claim 1, wherein said glass is an SOG (Spin On Glass).
Claim 5
Dependent Claim 30 words
A method for manufacturing a semiconductor memory device with a capacitor as claimed in claim 1, wherein said capacitor is utilized as a cell capacitor of a highly integrated DRAM.
Claim 6
Dependent Claim 29 words
A method for manufacturing a semiconductor memory device with a capacitor as claimed in claim 4, wherein said oxide grains have a diameter of about 0.05 to 0.1 μm.
Claim 7
Dependent Claim 25 words
A method for manufacturing a semiconductor memory device with a capacitor as claimed in claim 4, wherein said conductive material is an impurity-doped polycrystalline silicon.
Claim 8
Dependent Claim 32 words
A method for manufacturing a semiconductor memory device with a capacitor as claimed in claim 4, wherein said storage electrodes defined into each unit cell, comprise about 5 to 25 pillar-shaped electrodes.

References Cited (Backward Citations)

US4906590A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-10-27 1996-04-27 1996-10-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-10-27 2000-04-27 2000-10-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-10-27 2004-04-27 2004-10-27 $7700.00 Window Closed / Lapsed

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