Patent US5780933A successfully refreshed from Google Patents.
US5780933A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Substrate for semiconductor device and semiconductor device using the same
Assignee: Toshiba Corp
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Filing: 1996-05-10
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Granted: 1998-07-14
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Expires: 2016-05-10
Abstract
Abstract A one-sided sealed type semiconductor device comprising a substrate proper for a one-sided resin mold provided on the first main surface thereof with a wiring circuit including connection parts for semiconductor elements and on the second main surface thereof with flat type external connection terminals led out thereon via a through hole, semiconductor elements set in place and packaged in predetermined areas of the first main surface of the substrate proper, a transfer mold resin layer for sealing solely the surface having the semiconductor elements packaged thereon, and a metallic layer formed on the first main surface independently of wiring circuit and outside the area having the wiring circuit.
Inventors
- 👤 Jun Ohmori
- 👤 Hiroshi Iwasaki
- 👤 Takanori Jin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 10:25
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/01; H10W74/016; H10W70/00; H10W70/60; H10W70/699; H10W74/10; H10W74/111; H10W74/114; H10W72/00; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
77 words
A substrate for a one-sided sealed semiconductor device comprising: a substrate proper for a one-sided resin mold, a wiring circuit including connection parts for a semiconductor element on a first main surface of the substrate proper, flat-type external connection terminals led out on a second main surface of the substrate proper via through holes, and a metallic layer formed on the first main surface independently of the wiring circuit and outside an area of the wiring circuit.
Claim 2
Dependent Claim
77 words
A substrate for a one-sided sealed semiconductor device comprising: a substrate proper for a one-sided resin mold, a wiring circuit including connection parts for a semiconductor element on a first main surface of the substrate proper, flat-type external connection terminals led out on a second main surface of the substrate proper via through holes, and a metallic layer formed on the first main surface independently of the wiring circuit and outside an area of the wiring circuit.
Claim 3
Dependent Claim
18 words
The substrate according to claim 1, wherein the metallic layer has a surface layer formed of soft gold.
Claim 4
Dependent Claim
125 words
A one-sided sealed type semiconductor device, comprising: a substrate proper providing a wiring circuit including connection parts for a semiconductor element on a first main surface of the substrate proper and flat-type external connection terminals led out on a second main surface of the substrate proper via through holes; the semiconductor element mounted and packaged on the first main surface of the substrate proper; a transfer mold resin layer sealed solely between the mounted semiconductor element and the wiring circuit on the first main surface of the substrate, and a metallic layer formed on the first main surface outside an area of the wiring circuit and extended from an area of the mold resin layer to an adjoining outside area of the mold resin layer.
Claim 5
Dependent Claim
125 words
A one-sided sealed type semiconductor device, comprising: a substrate proper providing a wiring circuit including connection parts for a semiconductor element on a first main surface of the substrate proper and flat-type external connection terminals led out on a second main surface of the substrate proper via through holes; the semiconductor element mounted and packaged on the first main surface of the substrate proper; a transfer mold resin layer sealed solely between the mounted semiconductor element and the wiring circuit on the first main surface of the substrate, and a metallic layer formed on the first main surface outside an area of the wiring circuit and extended from an area of the mold resin layer to an adjoining outside area of the mold resin layer.
Claim 6
Dependent Claim
42 words
The semiconductor device according to claim 3, wherein said metallic layer is provided on a portion of the first main surface, the portion being a runner part for transfer molding when the resin is filled into the area of mold resin layer.
References Cited (Backward Citations)
JPS60106153A
Cited
JPS62120054A
Cited
US4907061A
Cited
JPH02205064A
Cited
EP0390996A2
Cited
JPH03105961A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-07-13 | 2002-01-12 | 2002-07-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-07-13 | 2006-01-12 | 2006-07-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-07-13 | 2010-01-12 | 2010-07-14 | $7700.00 | Window Closed / Lapsed |