Patent US5780337A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5780337A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating a bit line of a dynamic random access memory

Assignee: United Microelectronics Corp
•
Filing: 1996-11-19
•
Granted: 1998-07-14
•
Expires: 2016-11-19
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method of forming a bit line of a dynamic random access memory. An insulating layer is used to cover the source/drain region in a substrate. A trench is formed in the insulating layer above the source/drain region. Then, a portion of the insulating layer inside the trench is removed to form an opening which exposes the source/drain region. A conductor is used to fill the trench and the opening so as to form a bit line and a metal plug, respectively.

Inventors

  • 👤 Hsiu-Wen Huang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 20:47
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 169 words
A method of forming a bit line of a dynamic random access memory, comprising: providing a substrate having a memory cell region; forming a first memory cell and a second memory cell in the memory cell region, wherein the first memory cell and the second memory cell have a common source/drain region; forming a periphery circuit region on the substrate; forming an insulating layer over the substrate; forming a trench, having a bottom surface, in the insulating layer above the common source/drain region; removing a portion of the insulating layer at the bottom surface of the trench to form a first contact window, wherein the first contact window exposes the common source/drain region; forming a second contact window in the periphery circuit region simultaneously with forming the first contact window in the memory cell region; and filling the trench and the first contact window with a conductor, wherein the conductor in the trench serves as a bit line, and the conductor in the contact window serves as a plug.
Claim 2
Independent Claim 169 words
A method of forming a bit line of a dynamic random access memory, comprising: providing a substrate having a memory cell region; forming a first memory cell and a second memory cell in the memory cell region, wherein the first memory cell and the second memory cell have a common source/drain region; forming a periphery circuit region on the substrate; forming an insulating layer over the substrate; forming a trench, having a bottom surface, in the insulating layer above the common source/drain region; removing a portion of the insulating layer at the bottom surface of the trench to form a first contact window, wherein the first contact window exposes the common source/drain region; forming a second contact window in the periphery circuit region simultaneously with forming the first contact window in the memory cell region; and filling the trench and the first contact window with a conductor, wherein the conductor in the trench serves as a bit line, and the conductor in the contact window serves as a plug.
Claim 3
Dependent Claim 12 words
A method according to claim 1, wherein the insulating layer includes oxide.
Claim 4
Dependent Claim 20 words
A method according to claim 1, wherein the insulating layer has a thickness of about 600 nm to 1000 nm.
Claim 5
Dependent Claim 19 words
A method according to claim 1, wherein the trench has a depth of about 200 nm to 300 nm.
Claim 6
Dependent Claim 19 words
A method according to claim 1, wherein the trench has a width of about 300 nm to 600 nm.
Claim 7
Dependent Claim 11 words
A method according to claim 1, wherein the conductor includes tungsten.
Claim 8
Dependent Claim 18 words
A method according to claim 1, wherein said filling the trench and the first contact window includes sputtering.
Claim 9
Dependent Claim 16 words
A method according to claim 1, further comprising filling the second contact window with a conductor.

References Cited (Backward Citations)

US5248628A Cited
US5539231A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-07-13 2002-01-12 2002-07-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-07-13 2006-01-12 2006-07-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-07-13 2010-01-12 2010-07-14 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag