Patent US5778968A successfully refreshed from Google Patents.
US5778968A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for heating or cooling wafers
Assignee: Azenta Inc
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Filing: 1996-05-28
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Granted: 1998-07-14
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Expires: 2016-05-28
Abstract
Abstract Gas-loaded thermal conditioning is used to cause the temperature of a substrate to approach that of a high thermal inertia temperature-controlled plate by adjustable pressure of gas above the substrate, so as to press the substrate against the plate. There is no mechanical contact with the substrate except the plate which it rests on, and there is no danger of overheating or overcooling.
Inventors
- 👤 Ruth Ann Hendrickson
- 👤 Christopher Hofmeister
- 👤 Richard S. Muka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:49
CPC Classifications
C; C23; C23C; C23C16/00; C23C16/44; C23C16/46; C23C16/463; C23C16/458; C23C16/4582; C23C16/4583; C30; C30B; C30B25/00; C30B25/02; C30B25/10; C30B31/00; C30B31/06; C30B31/12; H; H10; H10P; H10P72/00; H10P72/04; H10P72/0431; H10P72/0432
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
327 words
A method of stabilizing the temperature of semiconductor wafers to a selected target temperature comprising the steps of: (a) maintaining at a selected target temperature the temperature of first and second high thermal inertia plates each having a flat surface for reception thereon of a semiconductor wafer; (b) positioning the first thermal plate at an initial wafer receiving position; (c) placing a first semiconductor wafer on the flat reception surface of the first thermal plate when the first thermal plate is positioned at the initial wafer receiving position; (d) moving the first thermal plate with the first semiconductor wafer thereon from the initial wafer receiving position to a final thermal conditioning position whereat the first semiconductor wafer is located inside a sealable first chamber associated with thermal conditioning apparatus; (e) introducing an inert pressurized gas into the first chamber for pressing the first semiconductor wafer uniformly across its surface against the flat reception surface of the first thermal plate for a period of time until the temperature of the first semiconductor wafer is substantially the same as that of the first thermal plate; (f) upon the conclusion of step (d), positioning the second thermal plate at an initial wafer receiving position; (g) placing a second semiconductor wafer on the flat reception surface of the second thermal plate when the second thermal plate is positioned at the initial wafer receiving position; (h) moving the second thermal plate with the second semiconductor wafer thereon from the initial wafer receiving position to a final thermal conditioning position whereat the second semiconductor wafer is located inside a sealable second chamber associated with the thermal conditioning apparatus; and (i) introducing an inert pressurized gas into the second chamber for pressing the second semiconductor wafer uniformly across its surface against the flat reception surface of the second thermal plate for a period of time until the temperature of the second semiconductor wafer is substantially the same as that of the second thermal plate.
Claim 2
Independent Claim
327 words
A method of stabilizing the temperature of semiconductor wafers to a selected target temperature comprising the steps of: (a) maintaining at a selected target temperature the temperature of first and second high thermal inertia plates each having a flat surface for reception thereon of a semiconductor wafer; (b) positioning the first thermal plate at an initial wafer receiving position; (c) placing a first semiconductor wafer on the flat reception surface of the first thermal plate when the first thermal plate is positioned at the initial wafer receiving position; (d) moving the first thermal plate with the first semiconductor wafer thereon from the initial wafer receiving position to a final thermal conditioning position whereat the first semiconductor wafer is located inside a sealable first chamber associated with thermal conditioning apparatus; (e) introducing an inert pressurized gas into the first chamber for pressing the first semiconductor wafer uniformly across its surface against the flat reception surface of the first thermal plate for a period of time until the temperature of the first semiconductor wafer is substantially the same as that of the first thermal plate; (f) upon the conclusion of step (d), positioning the second thermal plate at an initial wafer receiving position; (g) placing a second semiconductor wafer on the flat reception surface of the second thermal plate when the second thermal plate is positioned at the initial wafer receiving position; (h) moving the second thermal plate with the second semiconductor wafer thereon from the initial wafer receiving position to a final thermal conditioning position whereat the second semiconductor wafer is located inside a sealable second chamber associated with the thermal conditioning apparatus; and (i) introducing an inert pressurized gas into the second chamber for pressing the second semiconductor wafer uniformly across its surface against the flat reception surface of the second thermal plate for a period of time until the temperature of the second semiconductor wafer is substantially the same as that of the second thermal plate.
Claim 3
Dependent Claim
53 words
A method as set forth in claim 1 wherein step (c) includes the step of: (j) delivering the first semiconductor wafer onto the first thermal plate from a remote location; and wherein step (g) includes the step of: (k) delivering the second semiconductor wafer onto the second thermal plate from a remote location.
Claim 4
Dependent Claim
59 words
A method as set forth in claim 1 wherein step (d) includes the step of: (j) isolating the first chamber from the environment when the first thermal plate is in the final position; and wherein step (h) includes the step of: (k) isolating the second chamber from the environment when the second thermal plate is in the final position.
Claim 5
Dependent Claim
61 words
A method as set forth in claim 1 wherein step (c) includes the step of: (j) selectively affixing the first semiconductor wafer to the first thermal plate by applying vacuum to an undersurface thereof; and wherein step (h) includes the step of: (k) selectively affixing the second semiconductor wafer to the second thermal plate by applying vacuum to an undersurface thereof.
Claim 6
Dependent Claim
31 words
A method as set forth in claim 1 wherein step (a) includes the step of: (j) raising the temperature of the first and second thermal plates to the selected target temperature.
Claim 7
Dependent Claim
31 words
A method as set forth in claim 1 wherein step (a) includes the step of: (j) lowering the temperature of the first and second thermal plates to the selected target temperature.
Claim 8
Dependent Claim
53 words
A method as set forth in claim 1 including the steps of: (j) evacuating the first chamber after the temperature of the first semiconductor wafer has substantially achieved the selected target temperature; and (k) evacuating the second chamber after the temperature of the second semiconductor wafer has substantially achieved the selected target temperature.
Claim 9
Dependent Claim
45 words
A method as set forth in claim 1 wherein the initial wafer receiving location is at a transfer plane common to both the first and second thermal plates when each of the first and second thermal plates is in its respective initial wafer receiving position.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-07-13 | 2002-01-12 | 2002-07-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-07-13 | 2006-01-12 | 2006-07-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-07-13 | 2010-01-12 | 2010-07-14 | $7700.00 | Window Closed / Lapsed |