Patent US5776825A successfully refreshed from Google Patents.
US5776825A
Expired / Lapsed
US
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Method for forming a semiconductor device having reduced stepped portions
Assignee: Renesas Electronics Corp
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Filing: 1997-06-05
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Granted: 1998-07-07
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Expires: 2017-06-05
Abstract
Abstract A first conductive layer and a second conductive layer are formed apart from each other on a surface of a semiconductor substrate. A first contact hole for exposing a surface of first conductive layer is formed in an interlayer insulating film. A first interconnection layer is buried in first contact hole so as to be in contact with first conductive layer. The position of the surface of first interconnection layer is the same as or lower than the surface of interlayer insulating film. The surface of first interconnection layer is covered with an insulating film. A second contact hole for exposing a surface of second conductive layer is provided in interlayer insulating film. A second conductive layer is connected to second conductive layer through second contact hole.
Inventors
- 👤 Toshifumi Suganaga
- 👤 Eiichi Ishikawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 22:53
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/31; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10D; H10D1/00; H10D1/60; H10D1/68; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0144; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/069; H10W20/071; H10W20/081; H10W20/092; H10W20/40; H10W20/41; H10W20/44; H10W20/4451
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
220 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first conductive layer and a second conductive layer apart from each other on a surface of a semiconductor substrate; forming an interlayer insulating film on said semiconductor substrate; simultaneously forming in said interlayer insulating film a first contact hole for exposing a surface of said first conductive layer and a second contact hole for exposing a surface of said second conductive layer; filling said first and second contact holes with an insulator having a higher etching rate than said interlayer insulating film; etching away said insulator filling said first contact hole while covering said second contact hole with resist; removing said resist; forming on said semiconductor substrate a first interconnection layer to be connected to said first conductive layer through said first contact hole; removing said first interconnection layer until the position of its surface is the same as or lower than the surface of said interlayer insulating film, thereby forming a buried first interconnection layer buried in said first contact hole; covering the surface of said buried first interconnection layer with an insulating film; removing said insulator filling said second contact hole; and forming on said interlayer insulating film a second interconnection layer to be connected to said second conductive layer through said second contact hole.
Claim 2
Independent Claim
220 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first conductive layer and a second conductive layer apart from each other on a surface of a semiconductor substrate; forming an interlayer insulating film on said semiconductor substrate; simultaneously forming in said interlayer insulating film a first contact hole for exposing a surface of said first conductive layer and a second contact hole for exposing a surface of said second conductive layer; filling said first and second contact holes with an insulator having a higher etching rate than said interlayer insulating film; etching away said insulator filling said first contact hole while covering said second contact hole with resist; removing said resist; forming on said semiconductor substrate a first interconnection layer to be connected to said first conductive layer through said first contact hole; removing said first interconnection layer until the position of its surface is the same as or lower than the surface of said interlayer insulating film, thereby forming a buried first interconnection layer buried in said first contact hole; covering the surface of said buried first interconnection layer with an insulating film; removing said insulator filling said second contact hole; and forming on said interlayer insulating film a second interconnection layer to be connected to said second conductive layer through said second contact hole.
Claim 3
Dependent Claim
61 words
A method of manufacturing a semiconductor device as recited in claim 1, wherein said step of forming the first interconnection layer includes the steps of: forming a TiN film on said semiconductor substrate so as to cover a sidewall and a bottom surface of said first contact hole; and forming a polysilicon film or a WSi film on said TiN film.
Claim 4
Dependent Claim
28 words
A method of manufacturing a semiconductor device as recited in claim 2, wherein said TiN film is formed by sputtering TiN by means of a collimation sputtering method.
Claim 5
Dependent Claim
25 words
A method of manufacturing a semiconductor device as recited in claim 1, wherein said first interconnection layer is removed by etching back or chemical/mechanical polishing.
Claim 6
Dependent Claim
33 words
A method of manufacturing a semiconductor device as recited in claim 1, wherein the insulator having the higher etching rate than said interlayer insulating film is formed of a spin-coatable coating oxide film.
Claim 7
Dependent Claim
21 words
A method of manufacturing a semiconductor device as recited in claim 5, wherein said insulator includes a spin on glass film.
Claim 8
Independent Claim
155 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first conductive layer and a second conductive layer apart from each other on a surface of a semiconductor substrate; forming an interlayer insulating film on said semiconductor substrate; forming in said interlayer insulating film a first contact hole exposing a surface of said first conductive layer and a second contact hole for exposing a surface of said second conductive layer; forming on said semiconductor substrate a buried first interconnection layer to be connected to said first conductive layer, the position of the surface of said buried first interconnection layer is the same as or lower than the position of the surface of said interlayer insulating film; covering the surface of said buried first interconnection layer with an insulating film; forming on said interlayer insulating film a second interconnection layer to be connected to said second conductive layer through said second contact hole.
Claim 9
Independent Claim
155 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first conductive layer and a second conductive layer apart from each other on a surface of a semiconductor substrate; forming an interlayer insulating film on said semiconductor substrate; forming in said interlayer insulating film a first contact hole exposing a surface of said first conductive layer and a second contact hole for exposing a surface of said second conductive layer; forming on said semiconductor substrate a buried first interconnection layer to be connected to said first conductive layer, the position of the surface of said buried first interconnection layer is the same as or lower than the position of the surface of said interlayer insulating film; covering the surface of said buried first interconnection layer with an insulating film; forming on said interlayer insulating film a second interconnection layer to be connected to said second conductive layer through said second contact hole.
Claim 10
Dependent Claim
80 words
A method of manufacturing a semiconductor device s recited in claim 7, wherein said step of forming the buried first interconnection to be connected to said first conductive layer includes the steps of: forming on said semiconductor substrate a first interconnection layer to be connected to said first conductive layer through said first contact hole; removing said first interconnection layer until the position of its surface is the same as or lower than the surface of said interlayer insulating film.
Claim 11
Dependent Claim
61 words
A method of manufacturing a semiconductor device as recited in claim 8, wherein said step of forming the first interconnection layer includes the steps of: forming a TiN film on said semiconductor substrate so as to cover a sidewall and a bottom surface of said first contact hole; and forming a silicon film on a WSi film on said TiN film.
Claim 12
Dependent Claim
28 words
A method of manufacturing a semiconductor device as recited in claim 9, wherein said TiN film is formed by sputtering TiN by means of a collimation sputtering method.
Claim 13
Dependent Claim
25 words
A method of manufacturing a semiconductor device as recited in claim 8, wherein said first interconnection layer is removed by etching back or chemical/mechanical polishing.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-07-06 | 2002-01-05 | 2002-07-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-07-06 | 2006-01-05 | 2006-07-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-07-06 | 2010-01-05 | 2010-07-07 | $7700.00 | Window Closed / Lapsed |