Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
67 words
A programmable logic device comprising: an instruction bus receiving programming instructions; a first programmable function unit connected to the instruction bus; a second programmable function unit connected to the instruction bus; and an instruction-blocking circuit connected to each of the first and second programmable function units, the blocking circuit selectively blocking programming instructions from the instruction bus to one of the first and second programmable function units.
Claim 2
Dependent Claim
67 words
A programmable logic device comprising: an instruction bus receiving programming instructions; a first programmable function unit connected to the instruction bus; a second programmable function unit connected to the instruction bus; and an instruction-blocking circuit connected to each of the first and second programmable function units, the blocking circuit selectively blocking programming instructions from the instruction bus to one of the first and second programmable function units.
Claim 3
Dependent Claim
18 words
The device of claim 1, wherein the instruction blocking circuit is a register connected to a command bus.
Claim 4
Dependent Claim
13 words
The device of claim 1, wherein the first programmable function unit is reprogrammable.
Claim 5
Dependent Claim
56 words
The device of claim 1, wherein the first programmable function unit is programmed to implement a first logic function and the second programmable function unit is programmed to implement a second logic function, and wherein the second programmable function unit is reprogrammable during a time that the first programmable function unit performs the first logic function.
Claim 6
Dependent Claim
33 words
The device of claim 1, wherein the blocking circuit comprises: an input node connected to the instruction bus; and first and second output nodes connected to the first and second functional units, respectively.
Claim 7
Dependent Claim
41 words
The device of claim 5, wherein the input node is configured to receive a blocking instruction on the instruction bus, the blocking instruction indicating which of the first and second functional units responds to subsequent programming instruction on the instruction bus.
Claim 8
Dependent Claim
42 words
An integrated circuit comprising: first and second programmable function units programmed to perform first and second logic functions, respectively; and means for reprogramming the first programmable function unit during a time that the second programmable function unit performs the second logic function.
Claim 9
Dependent Claim
42 words
An integrated circuit comprising: first and second programmable function units programmed to perform first and second logic functions, respectively; and means for reprogramming the first programmable function unit during a time that the second programmable function unit performs the second logic function.
Claim 10
Dependent Claim
29 words
The circuit of claim 7, further comprising means for reprogramming the second programmable function unit during a time that the first programmable function unit performs the first logic function.
Claim 11
Independent Claim
64 words
A method of partially reprogramming a programmable logic device having first and second functional units, wherein the first and second functional units are programmed to implement first and second logic functions, respectively, the method comprising: providing programming instructions to the programmable logic device; and blocking the instructions to the first functional unit so that the first functional unit does not respond to the instructions.
Claim 12
Independent Claim
64 words
A method of partially reprogramming a programmable logic device having first and second functional units, wherein the first and second functional units are programmed to implement first and second logic functions, respectively, the method comprising: providing programming instructions to the programmable logic device; and blocking the instructions to the first functional unit so that the first functional unit does not respond to the instructions.