Patent US5757224A successfully refreshed from Google Patents.
US5757224A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Current mirror correction circuitry
Assignee: Caterpillar Inc
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Filing: 1996-04-26
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Granted: 1998-05-26
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Expires: 2016-04-26
Abstract
Abstract The present invention is directed toward a circuit for receiving an input current and for producing an output voltage proportional to the input current. The circuit includes a first transistor which receives the input current, and a second transistor connected to the first transistor, wherein the first and second transistors comprise a current mirror topology. A third transistor is connected in series with the first transistor, and an operational amplifier has an output which is connected to the base of the third transistor. The third transistor has a collector coupled to a base junction of the current mirror. The operational amplifier has a positive input terminal coupled to a collector of the second transistor through a first resistor, and a negative input terminal coupled to an emitter of the third transistor through a second resistor, the first and second resistors having substantially similar impedance values.
Inventors
- 👤 James A. Antone
- 👤 Brian W. Mann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:38
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/265
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
205 words
A circuit for receiving an input current and for producing an output voltage proportional to the input current, comprising: a current mirror including a first transistor for receiving the input current at an emitter thereof and a second transistor having a base coupled to a base of said first transistor; a third transistor connected in series with said first transistor and to ground, said third transistor being a conductive type reverse to that of said first and second transistors and having a collector coupled to a base junction of said first and second transistors; and an operational amplifier having an output connected to a based of said third transistor, said operational amplifier having a positive input terminal coupled to a collector of said second transistor and to ground through a first resistor, said operational amplifier having a negative input terminal coupled to an emitter of said third transistor through a second resistor, said first and second resistors having substantially similar impedance values; whereby said operational amplifier output drives said third transistor, causing the voltage across said first resistor to be equal to the voltage across said second resistor, such that the output voltage of the circuit is proportional to the input current to the circuit.
Claim 2
Dependent Claim
205 words
A circuit for receiving an input current and for producing an output voltage proportional to the input current, comprising: a current mirror including a first transistor for receiving the input current at an emitter thereof and a second transistor having a base coupled to a base of said first transistor; a third transistor connected in series with said first transistor and to ground, said third transistor being a conductive type reverse to that of said first and second transistors and having a collector coupled to a base junction of said first and second transistors; and an operational amplifier having an output connected to a based of said third transistor, said operational amplifier having a positive input terminal coupled to a collector of said second transistor and to ground through a first resistor, said operational amplifier having a negative input terminal coupled to an emitter of said third transistor through a second resistor, said first and second resistors having substantially similar impedance values; whereby said operational amplifier output drives said third transistor, causing the voltage across said first resistor to be equal to the voltage across said second resistor, such that the output voltage of the circuit is proportional to the input current to the circuit.
Claim 3
Dependent Claim
19 words
A circuit as recited in claim 1, including means for biasing said current mirror on at substantially all times.
Claim 4
Dependent Claim
21 words
A circuit as recited in claim 2, wherein said means for biasing comprises a pull-up resistor connected to said third transistor.
Claim 5
Dependent Claim
21 words
A circuit as recited in claim 3, including a capacitor connected in parallel with said first resistor, thereby forming a filter.
Claim 6
Dependent Claim
233 words
A circuit for receiving an input current and for producing an output voltage proportional to the input current, comprising: an input stage, said input stage providing input current to the circuit; a first leg, said first leg receiving said input current; a second leg connected to said first leg, said first and second legs comprising a current mirror including a first transistor and a second transistor, said second transistor having a base coupled to a base of said first transistor; a third leg connected in series with said first leg, said third leg including a third transistor and an operational amplifier, said third transistor having a collector coupled to a base junction of said current mirror, said operational amplifier having an output connected to a based of said third transistor, said operational amplifier having a positive input terminal coupled to said second leg and to ground through a first resistor, said operational amplifier having a negative input terminal coupled to said third transistor through a second resistor, said first and second resistors having substantially similar impedance values; and an output stage, said output stage producing an output voltage of the circuit; whereby said operational amplifier output drives said transistor, causing the voltage across said first resistor to be equal to the voltage across said second resistor, such that the output voltage of the circuit is proportional to the input current to the circuit.
Claim 7
Dependent Claim
233 words
A circuit for receiving an input current and for producing an output voltage proportional to the input current, comprising: an input stage, said input stage providing input current to the circuit; a first leg, said first leg receiving said input current; a second leg connected to said first leg, said first and second legs comprising a current mirror including a first transistor and a second transistor, said second transistor having a base coupled to a base of said first transistor; a third leg connected in series with said first leg, said third leg including a third transistor and an operational amplifier, said third transistor having a collector coupled to a base junction of said current mirror, said operational amplifier having an output connected to a based of said third transistor, said operational amplifier having a positive input terminal coupled to said second leg and to ground through a first resistor, said operational amplifier having a negative input terminal coupled to said third transistor through a second resistor, said first and second resistors having substantially similar impedance values; and an output stage, said output stage producing an output voltage of the circuit; whereby said operational amplifier output drives said transistor, causing the voltage across said first resistor to be equal to the voltage across said second resistor, such that the output voltage of the circuit is proportional to the input current to the circuit.
Claim 8
Dependent Claim
19 words
A circuit as recited in claim 5, including means for biasing said current mirror on at substantially all times.
Claim 9
Dependent Claim
20 words
A circuit as recited in claim 6, wherein said means for biasing comprises a pull-up resistor connected to said transistor.
Claim 10
Dependent Claim
17 words
A circuit as recited in claim 7, including a capacitor connected in parallel with said first resistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-05-25 | 2001-11-24 | 2002-05-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-05-25 | 2005-11-24 | 2006-05-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-05-25 | 2009-11-24 | 2010-05-26 | $7700.00 | Window Closed / Lapsed |