US4990845A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Floating current source
Assignee: Alfred E Mann Foundation for Scientific Research
•
Filing: 1989-12-18
•
Granted: 1991-02-05
•
Expires: 2009-12-18
Abstract
Abstract A floating current source comprising two identically sized field effect transistors, one defining a reference transistor and the other defining a floating output transistor. The reference transistor has its gate connected to a reference voltage and its source connected to receive an input current from an input current source and to generate a gate-to-source voltage which when applied as a gate-to-source voltage of the floating output transistor will generate an output current in the output transistor equal to the input current. Circuit means are included for applying between the gate and source of the output transistor a voltage equal to the gate-to-source drain voltage of the reference transistor.
Inventors
- 👤 John C. Gord
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 11:56
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
149 words
A floating current source, comprising: two field effect transistors FET's, one of said FETs defining a reference FET (FET-R) and the other defining a floating output FET, FET-O; FET-R having its gate connected to a reference voltage VR, and its source connected to receive an input current from an input current source and to generate a gate-to-source voltage which when applied as a gate-to-source voltage to FET-O will generate an output current in FET-O equal to the input current or a multiple thereof; and circuit means for applying source of FET-O a voltage equal to the gate-to-source voltage of FET-R, including a series circuit having two matching resistors, R1 and R2, means for generating a voltage V1 across R1 substantially equal to the gate-to-source voltage at FET-R, means for generating a substantially equal voltage V2 across R2, and means for applying V2 across the gate and source of FET-O.
Claim 2
Dependent Claim
149 words
A floating current source, comprising: two field effect transistors FET's, one of said FETs defining a reference FET (FET-R) and the other defining a floating output FET, FET-O; FET-R having its gate connected to a reference voltage VR, and its source connected to receive an input current from an input current source and to generate a gate-to-source voltage which when applied as a gate-to-source voltage to FET-O will generate an output current in FET-O equal to the input current or a multiple thereof; and circuit means for applying source of FET-O a voltage equal to the gate-to-source voltage of FET-R, including a series circuit having two matching resistors, R1 and R2, means for generating a voltage V1 across R1 substantially equal to the gate-to-source voltage at FET-R, means for generating a substantially equal voltage V2 across R2, and means for applying V2 across the gate and source of FET-O.
Claim 3
Dependent Claim
15 words
The current source of claim 1 wherein the two field effect transistors are identically sized.
Claim 4
Dependent Claim
146 words
The current source of claim 1 wherein: the means for generating V1 across R1 comprises means connecting one terminal of the series circuit to VR, an operational amplifier A1 and an FET Q having its drain-to-source circuit connected in series between R1 and R2 and its gate connected to an output of A1, the inputs of A1 being connected to the source of FET-R and a junction of R1 and the drain-to-source circuit in FET Q; and the means for generating V2 across R2 and applying V2 across the gate and source of FET-O comprises means connecting the gate of FET-O to a junction of R2 and the drain-to-source circuit of FET Q, and an operational amplifier A2 having its output and one of its inputs connected to a second terminal of the series circuit and another of its inputs connected to the source of FET-O.
Claim 5
Dependent Claim
26 words
The current source of claim 3 further including switch means connected to the gate and source of FET-O for selectively closing to apply V2 to FET-O.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-02-04 | 1994-08-06 | 1995-02-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-02-04 | 1998-08-06 | 1999-02-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-02-04 | 2002-08-06 | 2003-02-05 | $7700.00 | Window Closed / Lapsed |