US4546307A
Expired / Lapsed
US
⏱️ 0.0 years remaining
NPN Transistor current mirror circuit
Assignee: National Semiconductor Corp
•
Filing: 1984-01-03
•
Granted: 1985-10-08
•
Expires: 2004-01-03
Abstract
Abstract A current mirror using NPN transistors is described for use in PN junction isolated monolithic integrated circuits. A preferred embodiment operates at high accuracy over a wide range of output currents. It also operates at a relatively high signal frequency. An application in a charge pump, suitable for use in a digital phase locked loop, is detailed.
Inventors
- 👤 William D. Llewellyn
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 08:41
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
108 words
A current mirror circuit for sourcing output current to a load element as a linear function of a current, coupled as an input to said circuit, said circuit comprising: a differential amplifier having inverting and non-inverting inputs and an output; first resistive means coupled between said differential amplifier output and said inverting input; second resistive means coupled between said differential amplifier output and said non-inverting input; means for coupling an input current to said inverting input; means for coupling an output load to said non-inverting input; and means for making said first and second resistive means non-linear whereby the resistance is reduced as a function of increasing current.
Claim 2
Dependent Claim
108 words
A current mirror circuit for sourcing output current to a load element as a linear function of a current, coupled as an input to said circuit, said circuit comprising: a differential amplifier having inverting and non-inverting inputs and an output; first resistive means coupled between said differential amplifier output and said inverting input; second resistive means coupled between said differential amplifier output and said non-inverting input; means for coupling an input current to said inverting input; means for coupling an output load to said non-inverting input; and means for making said first and second resistive means non-linear whereby the resistance is reduced as a function of increasing current.
Claim 3
Dependent Claim
54 words
The current mirror circuit of claim 1 wherein said differential amplifier comprises a pair of transistors having their emitters commonly coupled to a first constant current element and the collector of the inverting transistor of said pair having its collector coupled to a second constant current element and to an emitter follower output transistor.
Claim 4
Dependent Claim
25 words
The circuit of claim 2 wherein said first and second constant current elements are ratioed at 2:1 and are slaved to a common control current.
Claim 5
Dependent Claim
20 words
The circuit of claim 3 wherein all transistors, with the exception of said second constant current element, are NPN transistors.
Claim 6
Dependent Claim
32 words
The circuit of claim 1 where said first and second resistive means are each made up of a plurality of series connected resistors and all but one are shunted by diode means.
Claim 7
Dependent Claim
12 words
The circuit of claim 5 wherein said diode means comprise Schottky diodes.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-10-07 | 1989-04-08 | 1989-10-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-10-07 | 1993-04-08 | 1993-10-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-10-07 | 1997-04-08 | 1997-10-08 | $7700.00 | Window Closed / Lapsed |