Extremum voltage supply circuit with improved switching

Claim 3

The method of claim 1, wherein the step of deriving the extremum output voltage from the first input voltage includes a step of following the first input voltage when the first input voltage is the extremum of the first and second input voltages.

Claim 4

The method of claim 2, wherein the first portion of the first circuit has an input to receive the first input voltage, has an output to provide the extremum output voltage, and the first current has an approximately steady value when the first input voltage is the extremum of the first and second input voltages; and the step of deriving the extremum output voltage from the second input voltage is performed by a first portion of the second circuit that has an input to receive the second input voltage, an output to provide the extremum output voltage, and has a second current of an approximately steady value when the second input voltage is the extremum of the first and second input voltages.

Claim 5

The method of claim 3, wherein the step of switching is performed by a second portion of the first circuit that is responsive to the first portion, the second portion preventing the first current from affecting the second circuit when the first input voltage is no longer the extremum of the first and second input voltages.

Claim 6

The method of claim 4, wherein the step of preventing keeps the first current of the first circuit from substantially changing the approximately steady value of the second current in the second circuit.

Claim 7

The method of claim 5, wherein the second portion of the first circuit balances the first current in the first portion of the first circuit with a current in the second portion of the first circuit when the first input voltage is the extremum of the first and second input voltages.

Claim 8

The method of claim 1, further comprising steps of: ceasing to derive the extremum output voltage from the second input voltage in the second circuit when the second input voltage is no longer the extremum of the first and second input voltages; and switching a second current that flows in a first portion of the second circuit when the second input voltage is the extremum of the first and second input voltages to flow in a second portion of the second circuit responsive to the step of ceasing to derive from the second input voltage.

Claim 9

The method of claim 1, wherein the first portion of the first circuit has an input to receive the first input voltage, has an output to provide the extremum output voltage, and the first current has an approximately steady value when the first input voltage is the extremum of the first and second input voltages; and the step of deriving the extremum output voltage from the second input voltage is performed by a first portion of the second circuit that has an input to receive the second input voltage, an output to provide the extremum output voltage, and has a second current of an approximately steady value when the second input voltage is the extremum of the first and second input voltages.

Claim 10

The method of claim 1, wherein the step of switching is performed by a second portion of the first circuit that is responsive to the first portion, the second portion preventing the first current from affecting the second circuit when the first input voltage is no longer the extremum of the first and second input voltages.

Claim 11

A circuit that provides an extremum voltage from a plurality of input voltages, comprising, for each of the plurality of input voltages: a first bipolar transistor having a base that receives a respective one of the plurality of input voltages, having a collector, and having an emitter that is connected to a common output of the circuit, the common output providing the extremum voltage; a first constant current source coupled to the common output and a first supply voltage; a second constant current source coupling the collector of the first bipolar transistor to a second supply voltage; and a MOS transistor, having a gate that is connected to the collector of the first bipolar transistor, having a source that is connected to the second supply voltage, and having a drain that is connected to the emitter of the first bipolar transistor.

Claim 12

A circuit that provides an extremum voltage from a plurality of input voltages, comprising, for each of the plurality of input voltages: a first bipolar transistor having a base that receives a respective one of the plurality of input voltages, having a collector, and having an emitter that is connected to a common output of the circuit, the common output providing the extremum voltage; a first constant current source coupled to the common output and a first supply voltage; a second constant current source coupling the collector of the first bipolar transistor to a second supply voltage; and a MOS transistor, having a gate that is connected to the collector of the first bipolar transistor, having a source that is connected to the second supply voltage, and having a drain that is connected to the emitter of the first bipolar transistor.

Claim 13

The circuit of claim 10, wherein: the extremum voltage is a maximum voltage, the first bipolar transistor is an NPN transistor, and the MOS transistor is a p-channel MOS transistor.

Claim 14

A circuit that provides an extremum voltage from a plurality of input voltages, comprising, for each of the plurality of input voltages: a first bipolar transistor having a base that receives a respective one of the plurality of input voltages, having a collector that is coupled to a first supply voltage, and having an emitter that is connected to a common output of the circuit, the common output providing the extremum voltage; a first current source coupled to a second supply voltage; and switching means, for connecting the emitter of the first bipolar transistor to the first current source when the first bipolar transistor is on and for disconnecting the emitter of the first bipolar transistor from the first current source when the first bipolar transistor is off.

Claim 15

A circuit that provides an extremum voltage from a plurality of input voltages, comprising, for each of the plurality of input voltages: a first bipolar transistor having a base that receives a respective one of the plurality of input voltages, having a collector that is coupled to a first supply voltage, and having an emitter that is connected to a common output of the circuit, the common output providing the extremum voltage; a first current source coupled to a second supply voltage; and switching means, for connecting the emitter of the first bipolar transistor to the first current source when the first bipolar transistor is on and for disconnecting the emitter of the first bipolar transistor from the first current source when the first bipolar transistor is off.

Claim 16

The circuit of claim 12, wherein the first current source has a value, and the switching means includes: a second bipolar transistor having a base, a collector, and an emitter, the base of the second bipolar transistor being connected to the base of the first bipolar transistor, the collector of the second bipolar transistor being connected to the collector of the first bipolar transistor, and the emitter of the second bipolar transistor being electrically coupled to the second supply voltage through a second current source having a second value, the second value being one half the value of the first current source; a third bipolar transistor having a base, a collector, and an emitter, the base of the third bipolar transistor being electrically coupled to the emitter of the second bipolar transistor, the collector of the third bipolar transistor being electrically coupled to the emitter of the first bipolar transistor, and the emitter of the third bipolar transistor being electrically coupled to the second supply voltage through the first current source; and a fourth bipolar transistor forming a differential stage with the third bipolar transistor, the fourth bipolar transistor having a base that is electrically coupled to the emitter of the first bipolar transistor.

Claim 17

The circuit of claim 13, wherein the extremum voltage is a maximum voltage, and the first, second, third, and fourth bipolar transistors are NPN transistors.

Claim 18

A circuit for providing an extremum voltage from a plurality of input voltages, the circuit comprising: a first transistor having an input that is electrically coupled to a first of the plurality of input voltages and having a first output: a second transistor having an input that is electrically coupled to a second of the plurality of input voltages and having a first output, the first output of the second transistor being electrically coupled to the first output of the first transistor to provide the extremum voltage; a first switched current source that is electrically coupled to the first output of the first transistor, the first switched current source having a control input that is responsive to the first transistor, the first switched current source including a first current source and a third transistor having an input and first and second outputs, the input of the third transistor forming the control input of the first switched current source, the first output of the third transistor being electrically coupled to the first current source, and the second output of the third transistor being electrically coupled to the first output of the first transistor; and a second current source having a current value that is one half a current value of the first current source, the second current source being electrically coupled to the control input of the first switched current source.

Claim 19

A circuit for providing an extremum voltage from a plurality of input voltages, the circuit comprising: a first transistor having an input that is electrically coupled to a first of the plurality of input voltages and having a first output: a second transistor having an input that is electrically coupled to a second of the plurality of input voltages and having a first output, the first output of the second transistor being electrically coupled to the first output of the first transistor to provide the extremum voltage; a first switched current source that is electrically coupled to the first output of the first transistor, the first switched current source having a control input that is responsive to the first transistor, the first switched current source including a first current source and a third transistor having an input and first and second outputs, the input of the third transistor forming the control input of the first switched current source, the first output of the third transistor being electrically coupled to the first current source, and the second output of the third transistor being electrically coupled to the first output of the first transistor; and a second current source having a current value that is one half a current value of the first current source, the second current source being electrically coupled to the control input of the first switched current source.

Claim 20

A circuit for providing an extremum voltage from a plurality of input voltages, the circuit comprising: a first transistor having an input that is electrically coupled to a first of the plurality of input voltages and having a first output: a second transistor having an input that is electrically coupled to a second of the plurality of input voltages and having a first output, the first output of the second transistor being electrically coupled to the first output of the first transistor to provide the extremum voltage; a first switched current source that is electrically coupled to the first output of the first transistor, the first switched current source having a control input that is responsive to the first transistor, the first switched current source including a first current source and a third transistor having an input and first and second outputs, the input of the third transistor forming the control input of the first switched current source, the first output of the third transistor being electrically coupled to the first current source, and the second output of the third transistor being electrically coupled to the first output of the first transistor; and a compensating current source, the compensating current source being electrically coupled between a supply terminal and the first current source and having a control input that is electrically coupled to the first output of the first and second transistors.

Claim 21

A circuit for providing an extremum voltage from a plurality of input voltages, the circuit comprising: a first transistor having an input that is electrically coupled to a first of the plurality of input voltages and having a first output: a second transistor having an input that is electrically coupled to a second of the plurality of input voltages and having a first output, the first output of the second transistor being electrically coupled to the first output of the first transistor to provide the extremum voltage; a first switched current source that is electrically coupled to the first output of the first transistor, the first switched current source having a control input that is responsive to the first transistor, the first switched current source including a first current source and a third transistor having an input and first and second outputs, the input of the third transistor forming the control input of the first switched current source, the first output of the third transistor being electrically coupled to the first current source, and the second output of the third transistor being electrically coupled to the first output of the first transistor; and a compensating current source, the compensating current source being electrically coupled between a supply terminal and the first current source and having a control input that is electrically coupled to the first output of the first and second transistors.

Claim 22

A circuit for providing an extremum voltage from a plurality of input voltages, the circuit comprising: a first transistor having an input that is electrically coupled to a first of the plurality of input voltages and having a first output; a first switched current source that is electrically coupled to the first output of the first transistor, the first switched current source having a control input that is responsive to the first transistor; a second transistor having an input that is electrically coupled to a second of the plurality of input voltages and having a first output, the first output of the second transistor being electrically coupled to the first output of the first transistor to provide the extremum voltage; and a third transistor having an input to receive the first of the plurality of input voltages, and a first output that is electrically coupled to the control input of the first switched current source.

Claim 23

A circuit for providing an extremum voltage from a plurality of input voltages, the circuit comprising: a first transistor having an input that is electrically coupled to a first of the plurality of input voltages and having a first output; a first switched current source that is electrically coupled to the first output of the first transistor, the first switched current source having a control input that is responsive to the first transistor; a second transistor having an input that is electrically coupled to a second of the plurality of input voltages and having a first output, the first output of the second transistor being electrically coupled to the first output of the first transistor to provide the extremum voltage; and a third transistor having an input to receive the first of the plurality of input voltages, and a first output that is electrically coupled to the control input of the first switched current source.

Claim 24

The circuit of claim 17, wherein the first and third transistors each have a second output, the second output of the first transistor being electrically coupled to the second output of the third transistor, and the second output of the first and third transistors being electrically coupled to a supply terminal for receiving a supply voltage.

Claim 25

The circuit of claim 18, wherein the first switched current source includes a first current source and a fourth transistor having an input and first and second outputs, the input of the fourth transistor forming the control input of the first switched current source, the first output being electrically coupled to the first current source, and the second output being electrically coupled to the first output of the first transistor.

Claim 26

The circuit of claim 19, further comprising a second current source having a current value that is one half a current value of the first current source, the second current source being electrically coupled to both the first output of the third transistor and the control input of the first switched current source.

Claim 27

The circuit of claim 20, further comprising a compensating current source, the compensating current source being electrically coupled between the supply terminal and the first current source, and the compensating current source having a control input that is electrically coupled to the first output of the first and second transistors.

Claim 28

The circuit of claim 21, wherein the compensating current source is a fifth transistor having an input, and first and second outputs, the input being the control input of the compensating current source, the first output being electrically coupled to the first current source, and the second output being electrically coupled to the second output of the first and third transistors.

Claim 29

The circuit of claim 22, wherein the second transistor has a second output that is electrically coupled to the supply terminal, and the first output of the first, second, third, fourth, and fifth transistors is an emitter of a respective NPN transistor, the second output of the first, second, third, fourth, and fifth transistors is a collector of the respective NPN transistor, the input of the first, second, third, fourth, and fifth transistors is a base of the respective NPN transistor, and the extremum voltage is a maximum voltage.

Claim 30

A circuit for providing an extremum voltage from a plurality of input voltages, the circuit comprising: a first transistor having an input that is electrically coupled to a first of the plurality of input voltages: a first current source having a control input that is electrically coupled to the first transistor, and having an output that is electrically coupled to a first output of the first transistor; a second transistor having an input that is electrically coupled to a second of the plurality of input voltages, the second transistor being electrically coupled to the first transistor to provide the extremum voltage; a second current source having a control input that is electrically coupled to the second transistor, and having an output that is electrically coupled to a first output of the second transistor; a third current source that is electrically coupled to the first output of the first transistor and the first output of the second transistor; a fourth current source that is electrically coupled to a second output of the first transistor; and a fifth current source that is electrically coupled to a second output of the second transistor; wherein the first current source includes a first controlled transistor that is electrically coupled between the first output of the first transistor and a first reference voltage terminal, the first controlled transistor having a first terminal that is electrically coupled to the first reference voltage terminal, a second terminal that is electrically coupled to the first output of the first transistor, and a control terminal that forms the control input of the first current source, the control input being electrically coupled between the fourth current source and the second output of the first transistor; wherein the second current source includes a second controlled transistor that is electrically coupled between the first output of the second transistor and the first reference voltage terminal, the second controlled transistor having a first terminal that is electrically coupled to the first reference voltage terminal, a second terminal that is electrically coupled to the first output of the second transistor, and a control terminal that forms the control input of the second current source, the control input being electrically coupled between the fifth current source and the second output of the second transistor; and wherein the extremum voltage is a maximum voltage, the first and second transistors are NPN transistors, the first output of the first and second transistors being an emitter of the respective transistor, the second output being a collector of the respective transistor, and the input being a base of the respective transistor, and the first and second controlled transistors are P-channel transistors, the first terminal of the first and second controlled transistor being a source of the respective transistor, the second terminal being a drain of the respective transistor, and the control input being a gate of the respective transistor.

Claim 31

A circuit for providing an extremum voltage from a plurality of input voltages, the circuit comprising: a first transistor having an input that is electrically coupled to a first of the plurality of input voltages: a first current source having a control input that is electrically coupled to the first transistor, and having an output that is electrically coupled to a first output of the first transistor; a second transistor having an input that is electrically coupled to a second of the plurality of input voltages, the second transistor being electrically coupled to the first transistor to provide the extremum voltage; a second current source having a control input that is electrically coupled to the second transistor, and having an output that is electrically coupled to a first output of the second transistor; a third current source that is electrically coupled to the first output of the first transistor and the first output of the second transistor; a fourth current source that is electrically coupled to a second output of the first transistor; and a fifth current source that is electrically coupled to a second output of the second transistor; wherein the first current source includes a first controlled transistor that is electrically coupled between the first output of the first transistor and a first reference voltage terminal, the first controlled transistor having a first terminal that is electrically coupled to the first reference voltage terminal, a second terminal that is electrically coupled to the first output of the first transistor, and a control terminal that forms the control input of the first current source, the control input being electrically coupled between the fourth current source and the second output of the first transistor; wherein the second current source includes a second controlled transistor that is electrically coupled between the first output of the second transistor and the first reference voltage terminal, the second controlled transistor having a first terminal that is electrically coupled to the first reference voltage terminal, a second terminal that is electrically coupled to the first output of the second transistor, and a control terminal that forms the control input of the second current source, the control input being electrically coupled between the fifth current source and the second output of the second transistor; and wherein the extremum voltage is a maximum voltage, the first and second transistors are NPN transistors, the first output of the first and second transistors being an emitter of the respective transistor, the second output being a collector of the respective transistor, and the input being a base of the respective transistor, and the first and second controlled transistors are P-channel transistors, the first terminal of the first and second controlled transistor being a source of the respective transistor, the second terminal being a drain of the respective transistor, and the control input being a gate of the respective transistor.

Claim 32

A circuit for providing an extremum output voltage from first and second input voltages comprising: means for deriving the extremum output voltage from the first input voltage when the first input voltage is an extremum of the first and second input voltages; means for deriving the extremum output voltage from the second input voltage when the second input voltage is the extremum of the first and second input voltages; and means for switching a first current that flows in a first portion of the circuit when the first input voltage is the extremum of the first and second input voltages to flow in a second portion of the circuit when the first input voltage is no longer the extremum of the first and second input voltages; wherein the means for switching includes means for preventing the first current from affecting the means for deriving the extremum output voltage from the second input voltage when the first input voltage is no longer the extremum of the first and second input voltages.

Claim 33

A circuit for providing an extremum output voltage from first and second input voltages comprising: means for deriving the extremum output voltage from the first input voltage when the first input voltage is an extremum of the first and second input voltages; means for deriving the extremum output voltage from the second input voltage when the second input voltage is the extremum of the first and second input voltages; and means for switching a first current that flows in a first portion of the circuit when the first input voltage is the extremum of the first and second input voltages to flow in a second portion of the circuit when the first input voltage is no longer the extremum of the first and second input voltages; wherein the means for switching includes means for preventing the first current from affecting the means for deriving the extremum output voltage from the second input voltage when the first input voltage is no longer the extremum of the first and second input voltages.

Claim 34

The circuit of claim 25, wherein the means for deriving the extremum output voltage from the first input voltage includes means for following the first input voltage when the first input voltage is the extremum of the first and second input voltages.

Claim 35

A circuit for providing an extremum output voltage from first and second input voltages comprising: means for deriving the extremum output voltage from the first input voltage when the first input voltage is an extremum of the first and second input voltages; means for deriving the extremum output voltage from the second input voltage when the second input voltage is the extremum of the first and second input voltages; means for switching a first current that flows in a first portion of the circuit when the first input voltage is the extremum of the first and second input voltages to flow in a second portion of the circuit when the first input voltage is no longer the extremum of the first and second input voltages; and means for switching a second current that flows in a third portion of the circuit when the second input voltage is the extremum of the first and second input voltages to flow in a fourth portion of the circuit when the second input voltage is no longer the extremum of the first and second input voltages.

Claim 36

A circuit for providing an extremum output voltage from first and second input voltages comprising: means for deriving the extremum output voltage from the first input voltage when the first input voltage is an extremum of the first and second input voltages; means for deriving the extremum output voltage from the second input voltage when the second input voltage is the extremum of the first and second input voltages; means for switching a first current that flows in a first portion of the circuit when the first input voltage is the extremum of the first and second input voltages to flow in a second portion of the circuit when the first input voltage is no longer the extremum of the first and second input voltages; and means for switching a second current that flows in a third portion of the circuit when the second input voltage is the extremum of the first and second input voltages to flow in a fourth portion of the circuit when the second input voltage is no longer the extremum of the first and second input voltages.