US5753977A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device and lead frame therefor
Assignee: Mitsubishi Electric Corp
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Filing: 1996-12-18
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Granted: 1998-05-19
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Expires: 2016-12-18
Abstract
Abstract A semiconductor device includes a semiconductor chip; leads including first inner leads and second inner leads extending substantially radially from a central point of the semiconductor chip; electrical conductors electrically connecting the semiconductor chip to the lead frame; and an encapsulating resin encapsulating the semiconductor chip, the electrical conductors, and the inner leads, Each of the first inner leads has a first inner end located proximate the central point and each of the second inner leads has a second inner end located farther from the central point than the first inner ends. The first and second inner leads are alternatingly arranged. Thus, at least some of the inner leads extend under the semiconductor chip, providing heat conducting paths. The lead frame includes a frame and leads supported by the frame and including first inner leads and second inner leads extending substantially radially toward a central point of the frame. The lead frame is applicable for mounting semiconductor chips of different outer dimensions and a necessary clearance is maintained between the leads.
Inventors
- 👤 Kenichi Kusaka
- 👤 Yoshiharu Takahashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 12:24
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/01; H10W74/016; H10W70/00; H10W70/40; H10W70/461; H10W40/00; H10W40/20; H10W40/22; H10W40/70; H10W40/77; H10W40/778; H10W70/411; H10W70/421; H10W70/464; H10W70/466; H10W90/00; H10W90/811; H10W72/00; H10W72/071; H10W72/073; H10W72/07351; H10W72/07352; H10W72/30; H10W72/321; H10W72/50; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/851; H10W72/874; H10W72/884; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
127 words
A semiconductor device comprising: a semiconductor chip; a plurality of leads including first inner leads and second inner leads extending substantially radially from a central point of said semiconductor chip; electrical conductors electrically connecting said semiconductor chip to at least one of said first and second inner leads; and an encapsulating resin encapsulating said semiconductor chip, said electrical conductors, and said first and second inner leads, said first inner leads each having a first inner end located proximate said central point, said second inner leads each having a second inner end located farther than said first inner ends from said central point, said first and second inner leads being substantially alternatingly arranged wherein said semiconductor chip overlaps only said first inner leads, thereby providing heat conducting paths.
Claim 2
Dependent Claim
127 words
A semiconductor device comprising: a semiconductor chip; a plurality of leads including first inner leads and second inner leads extending substantially radially from a central point of said semiconductor chip; electrical conductors electrically connecting said semiconductor chip to at least one of said first and second inner leads; and an encapsulating resin encapsulating said semiconductor chip, said electrical conductors, and said first and second inner leads, said first inner leads each having a first inner end located proximate said central point, said second inner leads each having a second inner end located farther than said first inner ends from said central point, said first and second inner leads being substantially alternatingly arranged wherein said semiconductor chip overlaps only said first inner leads, thereby providing heat conducting paths.
Claim 3
Dependent Claim
145 words
A semiconductor device comprising: a semiconductor chip; a plurality of leads including first inner leads, second inner leads, and third inner leads extending substantially radially from a central point of said semiconductor chip; electrical conductors electrically connecting said semiconductor chip to at least one of said first, second, and third inner leads; and an encapsulating resin encapsulating said semiconductor chip, said electrical conductors, and said first, second, and third inner leads, said first inner leads each having a first inner end located proximate said central point, said second inner leads each having a second inner end located farther than said first inner ends from said central point, said third inner leads each having a third inner end located farther than said second inner ends from said central point, wherein said semiconductor chip overlaps only said first and second inner leads, thereby providing heat conducting paths.
Claim 4
Dependent Claim
145 words
A semiconductor device comprising: a semiconductor chip; a plurality of leads including first inner leads, second inner leads, and third inner leads extending substantially radially from a central point of said semiconductor chip; electrical conductors electrically connecting said semiconductor chip to at least one of said first, second, and third inner leads; and an encapsulating resin encapsulating said semiconductor chip, said electrical conductors, and said first, second, and third inner leads, said first inner leads each having a first inner end located proximate said central point, said second inner leads each having a second inner end located farther than said first inner ends from said central point, said third inner leads each having a third inner end located farther than said second inner ends from said central point, wherein said semiconductor chip overlaps only said first and second inner leads, thereby providing heat conducting paths.
Claim 5
Dependent Claim
177 words
A semiconductor device comprising: a semiconductor chip; a plurality of leads including first inner leads and second inner leads extending substantially radially from a central point of said semiconductor chip; electrical conductors electrically connecting said semiconductor chip to at least one of said first and second inner leads; an encapsulating resin encapsulating said semiconductor chip, said electrical conductors, and said first and second inner leads, said first inner leads each having a first inner end located proximate said central point, said second inner leads each having a second inner end located farther than said first inner ends from said central point, said first and second inner leads being substantially alternatingly arranged wherein said semiconductor chip overlaps at least some of said first and second inner leads, thereby providing heat conducting paths; and an electrically insulating thermal conductor having a frame shape with inner and outer peripheries, the outer periphery being larger than an outer periphery of said semiconductor chip, said thermal conductor being disposed within said encapsulating resin between said semiconductor chip and said first inner leads.
Claim 6
Dependent Claim
177 words
A semiconductor device comprising: a semiconductor chip; a plurality of leads including first inner leads and second inner leads extending substantially radially from a central point of said semiconductor chip; electrical conductors electrically connecting said semiconductor chip to at least one of said first and second inner leads; an encapsulating resin encapsulating said semiconductor chip, said electrical conductors, and said first and second inner leads, said first inner leads each having a first inner end located proximate said central point, said second inner leads each having a second inner end located farther than said first inner ends from said central point, said first and second inner leads being substantially alternatingly arranged wherein said semiconductor chip overlaps at least some of said first and second inner leads, thereby providing heat conducting paths; and an electrically insulating thermal conductor having a frame shape with inner and outer peripheries, the outer periphery being larger than an outer periphery of said semiconductor chip, said thermal conductor being disposed within said encapsulating resin between said semiconductor chip and said first inner leads.
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JPH0228966A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-05-18 | 2001-11-17 | 2002-05-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-05-18 | 2005-11-17 | 2006-05-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-05-18 | 2009-11-17 | 2010-05-19 | $7700.00 | Window Closed / Lapsed |