Damascene process for reduced feature size

Claim 2

A semiconductor device comprising: a first dielectric layer, comprising a first dielectric material, having an upper surface, a lower surface, and a first opening in the form of a trench formed by a single damascene technique extending through the first dielectric layer from the upper surface to the lower surface, wherein the first opening has a first dimension defined by a first sidewall having a finite thickness comprising a second dielectric material; and a conductive material filling the trench to form a substantially horizontal conductive line of a conductive pattern sandwiched by the second dielectric material.

Claim 3

The semiconductor device according to claim 1, wherein the second dielectric material is the same as the first dielectric material.

Claim 4

The semiconductor device according to claim 1, wherein the second dielectric material is different from the first dielectric material.

Claim 5

The semiconductor device according to claim 1, wherein the first dimension is less than about 0.30 microns.

Claim 6

The semiconductor device according to claim 4, wherein the first dimension is about 0.15 to about 0.25 microns.

Claim 7

The semiconductor device according to claim 5, wherein the first dimension is about 0.18 microns to about 0.20 microns.

Claim 8

The semiconductor device according to claim 3, wherein the thickness of the first sidewall is not less than about 0.05 microns.

Claim 9

The semiconductor device according to claim 6, wherein the thickness of the first sidewall is not less than about 0.1 microns.

Claim 10

The semiconductor device according to claim 3, wherein the second dielectric material has a hardness and/or density greater than that of the first dielectric material.

Claim 11

The semiconductor device according to claim 3, wherein the second dielectric material has a greater resistance to moisture penetration than the first dielectric material.

Claim 12

The semiconductor device according to claim 1, wherein the second dielectric material is selected from the group consisting of silicon dioxide, silicon nitride and silicon oxynitrides.

Claim 13

The semiconductor device according to claim 11, wherein the second dielectric material comprises silicon dioxide derived from deposited tetraethyl orthosilicate.

Claim 14

A semiconductor device comprising: a first dielectric layer, comprising a first dielectric material, having an upper surface, a lower surface, and a first opening extending through the first dielectric layer from the upper surface to the lower surface, wherein the first opening has a first dimension defined by a first sidewall having a finite thickness comprising a second dielectric material; and a second dielectric layer, comprising a third dielectric material, formed above the first dielectric layer; wherein the second dielectric layer comprises an upper surface, a lower surface on the first dielectric layer, a second opening, in the form of a trench, through the second dielectric layer extending from the upper surface to the lower surface of the second dielectric layer and communicating with the first opening, and having a second dimension defined by a sidewall having a finite thickness comprising the second dielectric material; and a conductive material filling said first and second openings, wherein the conductive material filling the second opening forms a substantially horizontal conductive line of a conductive pattern sandwiched by the second dielectric material.

Claim 15

A semiconductor device comprising: a first dielectric layer, comprising a first dielectric material, having an upper surface, a lower surface, and a first opening extending through the first dielectric layer from the upper surface to the lower surface, wherein the first opening has a first dimension defined by a first sidewall having a finite thickness comprising a second dielectric material; and a second dielectric layer, comprising a third dielectric material, formed above the first dielectric layer; wherein the second dielectric layer comprises an upper surface, a lower surface on the first dielectric layer, a second opening, in the form of a trench, through the second dielectric layer extending from the upper surface to the lower surface of the second dielectric layer and communicating with the first opening, and having a second dimension defined by a sidewall having a finite thickness comprising the second dielectric material; and a conductive material filling said first and second openings, wherein the conductive material filling the second opening forms a substantially horizontal conductive line of a conductive pattern sandwiched by the second dielectric material.

Claim 16

A semiconductor device comprising: a first dielectric layer, comprising a first dielectric material, having an upper surface, a lower surface, and a first opening extending through the first dielectric layer from the upper surface to the lower surface, wherein the first opening has a first dimension defined by a first sidewall having a finite thickness comprising a second dielectric material; and a second dielectric layer, comprising a third dielectric material, formed above the first dielectric layer; wherein the second dielectric layer comprises an upper surface, a lower surface on the first dielectric layer, a second opening, in the form of a trench, through the second dielectric layer extending from the upper surface to the lower surface of the second dielectric layer and communicating with the first opening, and having a second dimension defined by a sidewall having a finite thickness comprising the second dielectric material; and a conductive material filling said first and second openings, wherein the conductive material filling the second opening forms a conductive line sandwiched by the second dielectric material, and the second dimension is less than the first dimension.

Claim 17

A semiconductor device comprising: a first dielectric layer, comprising a first dielectric material, having an upper surface, a lower surface, and a first opening extending through the first dielectric layer from the upper surface to the lower surface, wherein the first opening has a first dimension defined by a first sidewall having a finite thickness comprising a second dielectric material; and a second dielectric layer, comprising a third dielectric material, formed above the first dielectric layer; wherein the second dielectric layer comprises an upper surface, a lower surface on the first dielectric layer, a second opening, in the form of a trench, through the second dielectric layer extending from the upper surface to the lower surface of the second dielectric layer and communicating with the first opening, and having a second dimension defined by a sidewall having a finite thickness comprising the second dielectric material; and a conductive material filling said first and second openings, wherein the conductive material filling the second opening forms a conductive line sandwiched by the second dielectric material, and the second dimension is less than the first dimension.

Claim 18

The semiconductor device according to claim 13, wherein the second dimension is equal to the first dimension.

Claim 19

The semiconductor device according to claim 13, wherein the second dimension is greater than the first dimension.

Claim 20

The semiconductor device according to claim 13, wherein the second dimension is less than about 0.30 microns.

Claim 21

The semiconductor device according to claim 13, wherein the second dimension is about 0.15 to about 0.25 microns.

Claim 22

The semiconductor device according to claim 13, further comprising a dielectric film between the upper surface of the first dielectric layer and the lower surface of the second dielectric layer, with an opening formed in the dielectric film through which the second opening communicates with the first opening.

Claim 23

The semiconductor device according to claim 13, wherein the first dielectric material is the same as the third dielectric material.