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US5753541A
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Method of fabricating polycrystalline silicon-germanium thin film transistor
Assignee: NEC Corp
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Filing: 1996-04-24
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Granted: 1998-05-19
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Expires: 2016-04-24
Abstract
Abstract A method for fabricating a silicon-germanium thin film field effect transistor (TFT) with a high carrier mobility and a high on/off ratio. An amorphous silicon layer, an amorphous germanium layer and a gate insulating film are successively layered on an insulating substrate on which a pair of source and drain electrodes are formed. Next, the amorphous silicon layer and the amorphous germanium layer are converted into polycrystalline layers by thermal annealing at a temperature higher than 600° C. or laser annealing. Then, a gate electrode is formed on the gate insulating film.
Inventors
- 👤 Kousaku Shimizu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 07:07
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6731; H10D30/674; H10D30/6741; H10D30/6748; H10P; H10P14/00; H10P14/20; H10P14/38; H10P14/3802; H10P14/3808; Y; Y10; Y10S; Y10S148/00; Y10S148/058
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
103 words
A method of fabricating a polycrystalline silicon-germanium thin film transistor on an insulating substrate, comprising the steps of: forming a conductive thin film on an insulating substrate and patterning the conductive thin film to form a source electrode and a drain electrode; successively layering an amorphous silicon layer, an amorphous germanium layer and an insulating film on the insulating substrate on which the source electrode and the drain electrode are formed; and converting the amorphous silicon layer into a polycrystalline silicon layer, converting the amorphous germanium layer into a polycrystalline germanium layer and forming a gate electrode on the insulating film by patterning.
Claim 2
Independent Claim
103 words
A method of fabricating a polycrystalline silicon-germanium thin film transistor on an insulating substrate, comprising the steps of: forming a conductive thin film on an insulating substrate and patterning the conductive thin film to form a source electrode and a drain electrode; successively layering an amorphous silicon layer, an amorphous germanium layer and an insulating film on the insulating substrate on which the source electrode and the drain electrode are formed; and converting the amorphous silicon layer into a polycrystalline silicon layer, converting the amorphous germanium layer into a polycrystalline germanium layer and forming a gate electrode on the insulating film by patterning.
Claim 3
Independent Claim
113 words
A method of fabricating a polycrystalline silicon-germanium thin film transistor on an insulating substrate, comprising the steps of: forming a conductive thin film on an insulating substrate and patterning the conductive thin film to form a source electrode and a drain electrode; successively layering an amorphous silicon layer, an amorphous germanium layer and an insulating film on the insulating substrate on which the source electrode and the drain electrode are formed; and performing annealing by irradiation of laser light to convert the amorphous silicon layer into a polycrystalline silicon layer, to convert the amorphous germanium layer into a polycrystalline germanium layer and to form a gate electrode on the insulating film by patterning.
Claim 4
Independent Claim
113 words
A method of fabricating a polycrystalline silicon-germanium thin film transistor on an insulating substrate, comprising the steps of: forming a conductive thin film on an insulating substrate and patterning the conductive thin film to form a source electrode and a drain electrode; successively layering an amorphous silicon layer, an amorphous germanium layer and an insulating film on the insulating substrate on which the source electrode and the drain electrode are formed; and performing annealing by irradiation of laser light to convert the amorphous silicon layer into a polycrystalline silicon layer, to convert the amorphous germanium layer into a polycrystalline germanium layer and to form a gate electrode on the insulating film by patterning.
Claim 5
Dependent Claim
37 words
The method of fabricating a polycrystalline silicon-germanium thin film transistor as set forth in claim 2, wherein the amorphous germanium layer is formed by a glow discharging method using a raw material gas containing fluorine and germane.
Claim 6
Dependent Claim
37 words
The method of fabricating a polycrystalline silicon-germanium thin film transistor as set forth in claim 3, wherein the amorphous silicon layer is formed by a glow discharging method using a raw material gas containing fluorine and silane.
Claim 7
Dependent Claim
35 words
The method of fabricating a polycrystalline silicon-germanium thin film transistor as set forth in claim 2, wherein the amorphous germanium layer is formed with a thickness greater than 2 nm but smaller than 20 nm.
Claim 8
Dependent Claim
25 words
The method of fabricating a polycrystalline silicon-germanium thin film transistor as set forth in claim 2, wherein the annealing is performed using an ultraviolet laser.
Claim 9
Independent Claim
115 words
A method of fabricating a polycrystalline silicon-germanium thin film transistor on an insulating substrate, comprising the steps of: forming a conductive thin film on an insulating substrate and patterning the conductive thin film to form a source electrode and a drain electrode; successively layering an amorphous silicon layer, an amorphous germanium layer and an insulating film on the insulating substrate on which the source electrode and the drain electrode are formed; and performing annealing at a temperature higher than 600° C. to convert the amorphous silicon layer into a polycrystalline silicon layer, to convert the amorphous germanium layer into a polycrystalline germanium layer and to form a gate electrode on the insulating film by patterning.
Claim 10
Independent Claim
115 words
A method of fabricating a polycrystalline silicon-germanium thin film transistor on an insulating substrate, comprising the steps of: forming a conductive thin film on an insulating substrate and patterning the conductive thin film to form a source electrode and a drain electrode; successively layering an amorphous silicon layer, an amorphous germanium layer and an insulating film on the insulating substrate on which the source electrode and the drain electrode are formed; and performing annealing at a temperature higher than 600° C. to convert the amorphous silicon layer into a polycrystalline silicon layer, to convert the amorphous germanium layer into a polycrystalline germanium layer and to form a gate electrode on the insulating film by patterning.
Claim 11
Dependent Claim
37 words
The method of fabricating a polycrystalline silicon-germanium thin film transistor as set forth in claim 7, wherein the amorphous germanium layer is formed by a glow discharging method using a raw material gas containing fluorine and germane.
Claim 12
Dependent Claim
37 words
The method of fabricating a polycrystalline silicon-germanium thin film transistor as set forth in claim 8, wherein the amorphous silicon layer is formed by a glow discharging method using a raw material gas containing fluorine and silane.
Claim 13
Dependent Claim
35 words
The method of fabricating a polycrystalline silicon-germanium thin film transistor as set forth in claim 7, wherein the amorphous germanium layer is formed with a thickness greater than 2 nm but smaller than 20 nm.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-05-18 | 2001-11-17 | 2002-05-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-05-18 | 2005-11-17 | 2006-05-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-05-18 | 2009-11-17 | 2010-05-19 | $7700.00 | Window Closed / Lapsed |