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Thin film transistor having double gate insulating layer

Assignee: LG Display Co Ltd
•
Filing: 1997-04-14
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Granted: 1998-05-12
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Expires: 2017-04-14
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Abstract

Abstract A thin film transistor and method includes a substrate and a first semiconductor layer formed on the substrate. A first insulating layer is formed on the first semiconductor layer, and a doped semiconductor layer is formed on an upper portion of the first semiconductor layer at first and second sides of the first insulating layer. A second insulating layer is formed on the first insulating layer and the doped semiconductor layer, the second insulating layer having contact holes. A gate electrode is formed on a portion of the second insulating layer, and source and drain electrodes are formed on portions of the second insulating layer, the source and drain electrodes contacting the doped semiconductor layer through the contact holes, respectively.

Inventors

  • 👤 Jin Jang
  • 👤 Hong Joo Lim
  • 👤 Bong Yool Ryu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 04:36
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/67; H10D30/6729; H10D30/6737; H10D30/6739

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 112 words
A thin film transistor comprising: a substrate; a first semiconductor layer on the substrate; a first insulating layer on the first semiconductor layer; a doped semiconductor layer on only an upper portion of the first semiconductor layer at first and second sides of the first insulating layer; a second insulating layer on the first insulating layer and the doped semiconductor layer, the second insulating layer having contact holes and a portion contacting the substrate; a gate electrode on a portion of the second insulating layer; and source and drain electrodes on portions of the second insulating layer, the source and drain electrodes contacting the doped semiconductor layer through the contact holes, respectively.
Claim 2
Dependent Claim 112 words
A thin film transistor comprising: a substrate; a first semiconductor layer on the substrate; a first insulating layer on the first semiconductor layer; a doped semiconductor layer on only an upper portion of the first semiconductor layer at first and second sides of the first insulating layer; a second insulating layer on the first insulating layer and the doped semiconductor layer, the second insulating layer having contact holes and a portion contacting the substrate; a gate electrode on a portion of the second insulating layer; and source and drain electrodes on portions of the second insulating layer, the source and drain electrodes contacting the doped semiconductor layer through the contact holes, respectively.
Claim 3
Dependent Claim 15 words
The thin film transistor according to claim 1, wherein the substrate includes an insulating material.
Claim 4
Dependent Claim 16 words
The thin film transistor according to claim 2, wherein the insulating material includes a transparent material.
Claim 5
Dependent Claim 16 words
The thin film transistor according to claim 1, wherein the first insulating layer includes a stopper.
Claim 6
Dependent Claim 19 words
The thin film transistor according to claim 1, wherein the doped semiconductor layer includes a high concentration of impurities.
Claim 7
Dependent Claim 18 words
The thin film transistor according to claim 1, wherein the second insulating layer covers the first insulating layer.
Claim 8
Dependent Claim 21 words
The thin film transistor according to claim 1, wherein the gate electrode is above a portion of the first insulating layer.
Claim 9
Dependent Claim 23 words
The thin film transistor according to claim 1, wherein the first semiconductor layer includes one of an amorphous silicon and a polycrystal silicon.
Claim 10
Dependent Claim 24 words
The thin film transistor according to claim 1, further comprising a silicide layer on the doped semiconductor layer adjacent to the contact holes, respectively.
Claim 11
Dependent Claim 21 words
The thin film transistor according to claim 1, wherein a channel region is below a portion of the first insulating layer.
Claim 12
Dependent Claim 21 words
The thin film transistor according to claim 1, wherein the second insulating layer having a portion over the first semiconductor layer.
Claim 13
Dependent Claim 124 words
A thin film transistor comprising: a substrate; a first semiconductor layer on the substrate; a first insulating layer on the first semiconductor layer; a doped semiconductor layer on only an upper portion of the first semiconductor layer at first and second sides of the first insulating layer; a second insulating layer on the first insulating layer and the doped semiconductor layer, the second insulating layer having contact holes, a portion contacting the substrate and adjacent to the first and second sides of the first semiconductor layer; a gate electrode on a portion of the second insulating layer; and source and drain electrodes on portions of the second insulating layer, the source and drain electrodes contacting the doped semiconductor layer through the contact holes, respectively.
Claim 14
Dependent Claim 124 words
A thin film transistor comprising: a substrate; a first semiconductor layer on the substrate; a first insulating layer on the first semiconductor layer; a doped semiconductor layer on only an upper portion of the first semiconductor layer at first and second sides of the first insulating layer; a second insulating layer on the first insulating layer and the doped semiconductor layer, the second insulating layer having contact holes, a portion contacting the substrate and adjacent to the first and second sides of the first semiconductor layer; a gate electrode on a portion of the second insulating layer; and source and drain electrodes on portions of the second insulating layer, the source and drain electrodes contacting the doped semiconductor layer through the contact holes, respectively.
Claim 15
Dependent Claim 16 words
The thin film transistor according to claim 12, wherein the first insulating layer includes a stopper.
Claim 16
Dependent Claim 19 words
The thin film transistor according to claim 12, wherein the doped semiconductor layer includes a high concentration of impurities.
Claim 17
Dependent Claim 18 words
The thin film transistor according to claim 12, wherein the second insulating layer covers the first insulating layer.
Claim 18
Dependent Claim 21 words
The thin film transistor according to claim 12, wherein the gate electrode is above a portion of the first insulating layer.
Claim 19
Dependent Claim 23 words
The thin film transistor according to claim 12, wherein the first semiconductor layer includes one of an amorphous silicon and a polycrystal silicon.
Claim 20
Dependent Claim 24 words
The thin film transistor according to claim 12, further comprising a silicide layer on the doped semiconductor layer adjacent to the contact holes, respectively.
Claim 21
Dependent Claim 21 words
The thin film transistor according to claim 12, wherein a channel region is below a portion of the first insulating layer.
Claim 22
Dependent Claim 21 words
The thin film transistor according to claim 12, wherein the second insulating layer having a portion over the first semiconductor layer.

References Cited (Backward Citations)

US5289030A Cited
US5468987A Cited
JPH04299864A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-05-11 2001-11-10 2002-05-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-05-11 2005-11-10 2006-05-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-05-11 2009-11-10 2010-05-12 $7700.00 Window Closed / Lapsed

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