Variable-input-voltage converter with delay proportional to V in / V out

Claim 2

A power converter circuit, comprising: a transformer having primary and secondary windings; a controllable switch connected to vary current, from an input voltage connection, through said primary winding; wherein said input voltage varies substantially continuously; a power output connection operatively connected to draw power from said secondary winding of said transformer; and control logic operatively connected to control switching of said switch in a control relationship which, under at least some circumstances, includes a delay which is dependent on the ratio between the input voltage and the voltage of said power output connection, and is not dependent on direct sensing of the current across said switch nor of the current across said primary winding.

Claim 3

The circuit of claim 1, wherein said power output connections are configured to provide power to a computer system.

Claim 4

The circuit of claim 1, wherein said power output connections are configured to provide power to an electrical storage and recharging system.

Claim 5

The circuit of claim 1, wherein said controllable switch is a vertical DMOS device.

Claim 6

The circuit of claim 1, wherein said controllable switch is an NMOS device.

Claim 7

The circuit of claim 1, wherein said control logic comprises a first controller and a second controller; wherein communication between said first controller and said second controller is through a pulse transformer which is separate from said transformer.

Claim 8

A power conversion method, comprising the steps of: (a.) repeatedly switching a transistor to switch an input voltage, which varies over a voltage range of at least 3:1, onto an inductance, while keeping the frequency of said switching step substantially fixed whenever said input voltage falls within a first range of magnitudes, and varying the frequency of said switching step in dependence on said input voltage, whenever said input voltage falls within a second range of magnitudes; wherein said magnitudes of said second range are all greater than said magnitudes of said first range, and under at least some circumstances, delaying said switching step by a duration which is proportional to the ratio between said input voltage and the voltage of said output connection, and is not dependent on direct sensing of the current through said transistor; and (b.) coupling power out from said inductance to provide an output of converted power.

Claim 9

A power conversion method, comprising the steps of: (a.) repeatedly switching a transistor to switch an input voltage, which varies over a voltage range of at least 3:1, onto an inductance, while keeping the frequency of said switching step substantially fixed whenever said input voltage falls within a first range of magnitudes, and varying the frequency of said switching step in dependence on said input voltage, whenever said input voltage falls within a second range of magnitudes; wherein said magnitudes of said second range are all greater than said magnitudes of said first range, and under at least some circumstances, delaying said switching step by a duration which is proportional to the ratio between said input voltage and the voltage of said output connection, and is not dependent on direct sensing of the current through said transistor; and (b.) coupling power out from said inductance to provide an output of converted power.

Claim 10

The method of claim 7, wherein said output of converted power is used to provide power to a computer system.

Claim 11

The method of claim 7, wherein said output of converted power is used to provide power to an electrical storage and recharging system.

Claim 12

The method of claim 7, wherein said transistor is a vertical DMOS device.

Claim 13

The method of claim 7, wherein said transistor is an NMOS device.

Claim 14

A power converter circuit, comprising: a transformer having primary and secondary windings; a controllable switch connected to vary current, from an input voltage connection, through said primary winding; wherein said input voltage varies substantially continuously; a power output connection operatively connected to draw power from said secondary winding of said transformer; and secondary-side control logic operatively connected to draw power from said secondary winding of said transformer, and configured to control switching of said switch in a control relationship which, under at least some circumstances, includes a delay which is proportional to the ratio between the input voltage and the voltage of said output connection, and is not dependent on direct sensing of the current across said switch.

Claim 15

A power converter circuit, comprising: a transformer having primary and secondary windings; a controllable switch connected to vary current, from an input voltage connection, through said primary winding; wherein said input voltage varies substantially continuously; a power output connection operatively connected to draw power from said secondary winding of said transformer; and secondary-side control logic operatively connected to draw power from said secondary winding of said transformer, and configured to control switching of said switch in a control relationship which, under at least some circumstances, includes a delay which is proportional to the ratio between the input voltage and the voltage of said output connection, and is not dependent on direct sensing of the current across said switch.

Claim 16

The circuit of claim 12, wherein said power output connections are configured to provide power to a computer system.

Claim 17

The circuit of claim 12, wherein said power output connections are configured to provide power to an electrical storage and recharging system.

Claim 18

The circuit of claim 12, wherein said controllable switch is an NMOS device.

Claim 19

The circuit of claim 12, wherein said secondary-side control logic communicates with a primary-side control logic through a pulse transformer which is separate from said transformer.

Claim 20

The circuit of claim 12, wherein said secondary-side control logic, and a primary-side control logic operatively connected to said primary winding, communicate in master-slave relationship.

Claim 21

The circuit of claim 12, wherein said controllable switch is a vertical DMOS device.

Claim 22

A computer system, comprising: memory, and a microprocessor operatively connected to read and write said memory; a graphics controller connected to said microprocessor; a video display connected to said graphics controller; a transformer having primary and secondary windings; a controllable switch connected to vary current, from an input voltage connection, through said primary winding; wherein said input voltage varies substantially continuously; a power output connection operatively connected to draw power from said secondary winding of said transformer; and control logic operatively connected to control switching of said switch in a control relationship which, under at least some circumstances, includes a delay which is dependent on the ratio between said input voltage and the voltage of said power output connection, and is not dependent on direct sensing of the current across said switch nor of the current across said primary winding.

Claim 23

A computer system, comprising: memory, and a microprocessor operatively connected to read and write said memory; a graphics controller connected to said microprocessor; a video display connected to said graphics controller; a transformer having primary and secondary windings; a controllable switch connected to vary current, from an input voltage connection, through said primary winding; wherein said input voltage varies substantially continuously; a power output connection operatively connected to draw power from said secondary winding of said transformer; and control logic operatively connected to control switching of said switch in a control relationship which, under at least some circumstances, includes a delay which is dependent on the ratio between said input voltage and the voltage of said power output connection, and is not dependent on direct sensing of the current across said switch nor of the current across said primary winding.

Claim 24

The system of claim 19, wherein said controllable switch is a vertical DMOS device.

Claim 25

The system of claim 19, wherein said controllable switch is an NMOS device.

Claim 26

The system of claim 19, wherein said control logic comprises a first controller operatively connected to said primary winding and a second controller operatively connected to said secondary winding; wherein said first controller and said second controller operate in a master-slave relationship.

Claim 27

The system of claim 19, wherein said control logic comprises a first controller operatively connected to said primary winding and a second controller operatively connected to said secondary winding; wherein said first controller and said second controller communicate through a pulse transformer.

Claim 28

A power conversion circuit, comprising: means for repeatedly switching an input voltage, which varies over a voltage range of at least 3:1, onto an inductance, while keeping the frequency of said switching substantially fixed whenever said input voltage falls within a first range of magnitudes, and varying the frequency of said switching in dependence on said input voltage, whenever said input voltage falls within a second range of magnitudes; wherein said magnitudes of said second range are all greater than said magnitudes of said first range, and under at least some circumstances, delaying said switching by a duration which is proportional to the ratio between said input voltage and the voltage of said output connection, and is not dependent on direct sensing of the current across said switch; and means for coupling power out from said inductance to provide an output of converted power.

Claim 29

A power conversion circuit, comprising: means for repeatedly switching an input voltage, which varies over a voltage range of at least 3:1, onto an inductance, while keeping the frequency of said switching substantially fixed whenever said input voltage falls within a first range of magnitudes, and varying the frequency of said switching in dependence on said input voltage, whenever said input voltage falls within a second range of magnitudes; wherein said magnitudes of said second range are all greater than said magnitudes of said first range, and under at least some circumstances, delaying said switching by a duration which is proportional to the ratio between said input voltage and the voltage of said output connection, and is not dependent on direct sensing of the current across said switch; and means for coupling power out from said inductance to provide an output of converted power.

Claim 30

The circuit of claim 24, wherein said means for switching comprises a vertical DMOS device.

Claim 31

The system of claim 24, wherein said means for switching comprises an NMOS device.