US5742246A
Expired / Lapsed
US
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Stabilizing mechanism for sigma-delta modulator
Assignee: National Science and Technology Council
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Filing: 1996-03-22
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Granted: 1998-04-21
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Expires: 2016-03-22
Abstract
Abstract The invention relates to a technique called "Internal Linear Feedback (ILF)" for the stabilization of high-order sigma-delta modulators. The ILF technique involves an overload detector and a selector. Once "overloaded" is detected by the overload detector, the selector is activated to make the modulator entering the ILF mode, in which additional internal linear feedback paths are employed to stabilize the modulator. Otherwise, the modulator operates in normal mode as a general high-order modulator.
Inventors
- 👤 Tai-Haur Kuo
- 👤 Wen-Chyi Wang
- 👤 Kuan-Dar Chen
- 👤 Jhy-Rong Chen
- 👤 Jhy-Woei Yeh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 17:43
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/30; H03M3/322; H03M3/358; H03M3/36; H03M3/362; H03M3/39; H03M3/412; H03M3/422; H03M3/436; H03M3/438; H03M3/44; H03M3/446; H03M3/448; H03M3/454
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
272 words
An internal linear feedback (ILF) mechanism for stabilizing a multiple-feedback type high-order sigma-delta modulator utilized in analog-to-digital converters, said high-order sigma-delta modulator comprising at least three cascaded integrator stages, an analog-to-digital converter (ADC) means to which the output of the last integrator stage is coupled, and a digital-to-analog converter (DAC) means to which the output of the ADC means is coupled, wherein an output of said DAC means is coupled to an input of each integrator stage and wherein at least the first integrator stage in the high-order sigma-delta modulator forms a low-order modulator said ILF mechanism comprising: an overload detector, coupled to each of said cascaded integrator stages, said overload detector generating an overload signal when an output signal of at least one of said cascaded integrator stages exceeds a predetermined range corresponding to upper and lower limits of a stable operation range of said high-order sigma-delta modulator; and a selector circuit, coupled to and receiving said overload signal from said overload detector, that decouples the inputs of the integrator stages following the low-order modulator from the output of said DAC means and simultaneously couples the input of said ADC means to the inputs of the integrator stages following the low-order modulator when said overload detector generates said overload signal, said selector circuit recoupling the output of said DAC means to the inputs of the integrator stages following the low-order modulator and simultaneously decoupling the inputs of the integrator stages following the low-order modulator from the input of said ADC means when said output signal of said at least one of said cascaded integrator stages no longer exceeds said predetermined range.
Claim 2
Dependent Claim
272 words
An internal linear feedback (ILF) mechanism for stabilizing a multiple-feedback type high-order sigma-delta modulator utilized in analog-to-digital converters, said high-order sigma-delta modulator comprising at least three cascaded integrator stages, an analog-to-digital converter (ADC) means to which the output of the last integrator stage is coupled, and a digital-to-analog converter (DAC) means to which the output of the ADC means is coupled, wherein an output of said DAC means is coupled to an input of each integrator stage and wherein at least the first integrator stage in the high-order sigma-delta modulator forms a low-order modulator said ILF mechanism comprising: an overload detector, coupled to each of said cascaded integrator stages, said overload detector generating an overload signal when an output signal of at least one of said cascaded integrator stages exceeds a predetermined range corresponding to upper and lower limits of a stable operation range of said high-order sigma-delta modulator; and a selector circuit, coupled to and receiving said overload signal from said overload detector, that decouples the inputs of the integrator stages following the low-order modulator from the output of said DAC means and simultaneously couples the input of said ADC means to the inputs of the integrator stages following the low-order modulator when said overload detector generates said overload signal, said selector circuit recoupling the output of said DAC means to the inputs of the integrator stages following the low-order modulator and simultaneously decoupling the inputs of the integrator stages following the low-order modulator from the input of said ADC means when said output signal of said at least one of said cascaded integrator stages no longer exceeds said predetermined range.
Claim 3
Dependent Claim
16 words
The mechanism according to claim 1, wherein the high-order sigma-delta modulator is utilized in analog-to-digital converters.
Claim 4
Dependent Claim
21 words
The mechanism according to claim 2, wherein all components in said high-order sigma-delta modulator are realized in dealing with analog signals.
Claim 5
Dependent Claim
19 words
The mechanism according to claim 1, wherein the high-order sigma-delta modulator is realized in either discrete-time or continuous-time circuits.
Claim 6
Dependent Claim
22 words
The mechanism according to claim 1, wherein the high-order sigma-delta modulator is realized in dealing with either lowpass or bandpass input signal.
Claim 7
Dependent Claim
221 words
An internal linear feedback (ILF) mechanism for stabilizing a feedforward or follow-the-leader type high-order sigma-delta modulator utilized in analog-to-digital converters, said high-order sigma-delta modulator comprising at least three cascaded integrator stages, an analog-to-digital converter (ADC) means to which the output of the last integrator stage is coupled, and a digital-to-analog converter (DAC) means to which the output of the ADC means is coupled, wherein at least the first integrator stage in the high-order sigma-delta modulator forms a low-order modulator, said ILF mechanism comprising: an overload detector, coupled to each of said cascaded integrator stages, said overload detector generating an overload signal when an output signal of at least one of said cascaded integrator stages exceeds a predetermined range corresponding to upper and lower limits of a stable operation range of said high-order sigma-delta modulator; and a selector circuit, coupled to and receiving said overload signal from said overload detector, that couples the input of said ADC means to an input of each of said integrator stages following said low-order modulator when said overload detector generates said overload signal, said selector circuit decoupling the inputs of each of said integrator stages following the low-order modulator from the input of said ADC means when said output signal of said at least one of said cascaded integrator stages no longer exceeds said predetermined range.
Claim 8
Dependent Claim
221 words
An internal linear feedback (ILF) mechanism for stabilizing a feedforward or follow-the-leader type high-order sigma-delta modulator utilized in analog-to-digital converters, said high-order sigma-delta modulator comprising at least three cascaded integrator stages, an analog-to-digital converter (ADC) means to which the output of the last integrator stage is coupled, and a digital-to-analog converter (DAC) means to which the output of the ADC means is coupled, wherein at least the first integrator stage in the high-order sigma-delta modulator forms a low-order modulator, said ILF mechanism comprising: an overload detector, coupled to each of said cascaded integrator stages, said overload detector generating an overload signal when an output signal of at least one of said cascaded integrator stages exceeds a predetermined range corresponding to upper and lower limits of a stable operation range of said high-order sigma-delta modulator; and a selector circuit, coupled to and receiving said overload signal from said overload detector, that couples the input of said ADC means to an input of each of said integrator stages following said low-order modulator when said overload detector generates said overload signal, said selector circuit decoupling the inputs of each of said integrator stages following the low-order modulator from the input of said ADC means when said output signal of said at least one of said cascaded integrator stages no longer exceeds said predetermined range.
Claim 9
Dependent Claim
16 words
The mechanism according to claim 6, wherein the high-order sigma-delta modulators are utilized in analog-to-digital converters.
Claim 10
Dependent Claim
21 words
The mechanism according to claim 7, wherein all components in said high-order sigma-delta modulators are realized in dealing with analog signals.
Claim 11
Dependent Claim
19 words
The mechanism according to claim 6, wherein the high-order sigma-delta modulators are realized in either discrete-time or continuous-time circuits.
Claim 12
Dependent Claim
22 words
The mechanism according to claim 6, wherein the high-order sigma-delta modulators are realized in dealing with either lowpass or bandpass input signal.
Claim 13
Dependent Claim
261 words
An internal linear feedback (ILF) mechanism for stabilizing a multiple-feedback type high-order sigma-delta modulator utilized in digital-to-analog converters, said high-order sigma-delta modulator comprising at least three cascaded integrator stages and a digital quantizer means to which the output of the last integrator stage is coupled, wherein the output of said digital quantizer means is coupled to an input of each integrator stage and wherein at least the first integrator stage in the high-order sigma-delta modulator forms a low-order modulator said ILF mechanism comprising: an overload detector, coupled to each of said cascaded integrator stages, said overload detector generating an overload signal when an output signal of at least one of said cascaded integrator stages exceeds a predetermined range corresponding to upper and lower limits of a stable operation range of said high-order sigma-delta modulator; and a selector circuit, coupled to and receiving said overload signal from said overload detector, that decouples the inputs of the integrator stages following the low-order modulator from the output of said digital quantizer means and simultaneously couples the input of said digital quantizer means to the inputs of the integrator stages following the low-order modulator when said overload detector generates said overload signal, said selector circuit recoupling the output of said digital quantizer means to the inputs of the integrator stages following the low-order modulator and simultaneously decoupling the inputs of the integrator stages following the low-order modulator from the input of said digital quantizer means when said output signal of said at least one of said cascaded integrator stages no longer exceeds said predetermined range.
Claim 14
Dependent Claim
261 words
An internal linear feedback (ILF) mechanism for stabilizing a multiple-feedback type high-order sigma-delta modulator utilized in digital-to-analog converters, said high-order sigma-delta modulator comprising at least three cascaded integrator stages and a digital quantizer means to which the output of the last integrator stage is coupled, wherein the output of said digital quantizer means is coupled to an input of each integrator stage and wherein at least the first integrator stage in the high-order sigma-delta modulator forms a low-order modulator said ILF mechanism comprising: an overload detector, coupled to each of said cascaded integrator stages, said overload detector generating an overload signal when an output signal of at least one of said cascaded integrator stages exceeds a predetermined range corresponding to upper and lower limits of a stable operation range of said high-order sigma-delta modulator; and a selector circuit, coupled to and receiving said overload signal from said overload detector, that decouples the inputs of the integrator stages following the low-order modulator from the output of said digital quantizer means and simultaneously couples the input of said digital quantizer means to the inputs of the integrator stages following the low-order modulator when said overload detector generates said overload signal, said selector circuit recoupling the output of said digital quantizer means to the inputs of the integrator stages following the low-order modulator and simultaneously decoupling the inputs of the integrator stages following the low-order modulator from the input of said digital quantizer means when said output signal of said at least one of said cascaded integrator stages no longer exceeds said predetermined range.
Claim 15
Dependent Claim
21 words
The mechanism according to claim 11, wherein all components in said high-order sigma-delta modulator are realized in dealing with digital signals.
Claim 16
Dependent Claim
19 words
The mechanism according to claim 11, wherein the high-order sigma-delta modulator is realized in either discrete-time or continuous-time circuits.
Claim 17
Dependent Claim
22 words
The mechanism according to claim 11, wherein the high-order sigma-delta modulator is realized in dealing with either lowpass or bandpass input signal.
Claim 18
Dependent Claim
207 words
An internal linear feedback (ILF) mechanism for stabilizing a feedforward or follow-the-leader type high-order sigma-delta modulator utilized in digital-to-analog converters, said high-order sigma-delta modulator comprising at least three cascaded integrator stages and a digital quantizer means to which the output of the last integrator stage is coupled, wherein at least the first integrator stage in the high-order sigma-delta modulator forms a low-order modulator, said ILF mechanism comprising: an overload detector, coupled to each of said cascaded integrator stages, said overload detector generating an overload signal when an output signal of at least one of said cascaded integrator stages exceeds a predetermined range corresponding to upper and lower limits of a stable operation range of said high-order sigma-delta modulator; and a selector circuit, coupled to and receiving said overload signal from said overload detector, that couples the input of said digital quantizer means to an input of each of said integrator stages following the low-order modulator when said overload detector generates said overload signal, said selector circuit decoupling the inputs of each of said integrator stages following the low-order modulator from the input of said digital quantizer means when said output signal of said at least one of said cascaded integrator stages no longer exceeds said predetermined range.
Claim 19
Dependent Claim
207 words
An internal linear feedback (ILF) mechanism for stabilizing a feedforward or follow-the-leader type high-order sigma-delta modulator utilized in digital-to-analog converters, said high-order sigma-delta modulator comprising at least three cascaded integrator stages and a digital quantizer means to which the output of the last integrator stage is coupled, wherein at least the first integrator stage in the high-order sigma-delta modulator forms a low-order modulator, said ILF mechanism comprising: an overload detector, coupled to each of said cascaded integrator stages, said overload detector generating an overload signal when an output signal of at least one of said cascaded integrator stages exceeds a predetermined range corresponding to upper and lower limits of a stable operation range of said high-order sigma-delta modulator; and a selector circuit, coupled to and receiving said overload signal from said overload detector, that couples the input of said digital quantizer means to an input of each of said integrator stages following the low-order modulator when said overload detector generates said overload signal, said selector circuit decoupling the inputs of each of said integrator stages following the low-order modulator from the input of said digital quantizer means when said output signal of said at least one of said cascaded integrator stages no longer exceeds said predetermined range.
Claim 20
Dependent Claim
21 words
The mechanism according to claim 15, wherein all components in said high-order sigma-delta modulator are realized in dealing with digital signals.
Claim 21
Dependent Claim
19 words
The mechanism according to claim 15, wherein the high-order sigma-delta modulators are realized in either discrete-time or continuous-time circuits.
Claim 22
Dependent Claim
22 words
The mechanism according to claim 15, wherein the high-order sigma-delta modulators are realized in dealing with either lowpass or bandpass input signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-04-20 | 2001-10-20 | 2002-04-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-04-20 | 2005-10-20 | 2006-04-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-04-20 | 2009-10-20 | 2010-04-21 | $7700.00 | Window Closed / Lapsed |