US5202685A
Expired / Lapsed
US
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Digital sigma-delta modulator having a limiter circuit
Assignee: Toshiba Corp
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Filing: 1991-09-19
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Granted: 1993-04-13
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Expires: 2011-09-19
Abstract
Abstract A digital sigma-delta modulator comprises an adder, a quantizer, a subtracter, a filter circuit, and a limiter circuit. The adder adds input digital data and feedback data. The quantizer quantizes output data of the adder. The subtracter calculates a difference between output data of the quantizer and that of the adder. The filter circuit digitally processes output data of the subtracter to generate the feedback data. The limiter circuit is arranged in at least one position within an operation loop looping the adder, subtracter, and filter circuit and extracts (n-m)-bit data acquired by eliminating the significant m bit other than MSB from an n-bit data line.
Inventors
- 👤 Mitsuru Nagata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 15:17
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; H03M7/00; H03M7/30; H03M7/3002; H03M7/3004; H03M7/3015; H03M7/3031; H03M7/3042; H03M7/302; H03M7/3024; H03M7/3028
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
110 words
A digital sigma-delta modulator comprising: adder means for adding input digital data and feedback data; quantizer means for quantizing output data of said adder means; subtractor means for calculating a difference between the output data of said adder means and that of said quantizer means; filter means for digitally processing output data of said subtractor means to generate the feedback data; and limiter means, arranged in at least one position within an operation loop which loops said adder means, said subtractor means, and said filter means, for extracting (n-m)-bit data acquired by eliminating a significant m bit other than MSB, from an n-bit data line, producing a saw-tooth wave output.
Claim 2
Dependent Claim
110 words
A digital sigma-delta modulator comprising: adder means for adding input digital data and feedback data; quantizer means for quantizing output data of said adder means; subtractor means for calculating a difference between the output data of said adder means and that of said quantizer means; filter means for digitally processing output data of said subtractor means to generate the feedback data; and limiter means, arranged in at least one position within an operation loop which loops said adder means, said subtractor means, and said filter means, for extracting (n-m)-bit data acquired by eliminating a significant m bit other than MSB, from an n-bit data line, producing a saw-tooth wave output.
Claim 3
Dependent Claim
39 words
The digital sigma-delta modulator according to claim 1, wherein said limiter means is so formed that an (n-m)-bit line of input data lines, excluding the significant m bit other than the MSB, is directly connected to output data lines.
Claim 4
Dependent Claim
20 words
The digital sigma-delta modulator according to claim 1, further comprising latch means for latching an output of said limiter means.
Claim 5
Dependent Claim
30 words
A digital sigma-delta modulator according to claim 1, wherein: the limiter means operates to extract the bit data only when the input digital data has an abnormally large amplitude signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-04-12 | 1996-10-12 | 1997-04-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-04-12 | 2000-10-12 | 2001-04-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-04-12 | 2004-10-12 | 2005-04-13 | $7700.00 | Window Closed / Lapsed |