US5741741A
Expired / Lapsed
US
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Method for making planar metal interconnections and metal plugs on semiconductor substrates
Assignee: Vanguard International Semiconductor Corp
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Filing: 1996-05-23
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Granted: 1998-04-21
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Expires: 2016-05-23
Abstract
Abstract A method for making planar metal interconnections and T-shaped metal plugs for integrated circuits is achieved. The method involves forming a planar insulating (SiO 2 ) and a hard mask film over a first level of interconnections. A patterned first photoresist layer is then formed for etching trenches in the hard mask film and partially into the planar insulating layer (SiO 2 ) in which a second level of interconnections are to be formed. The patterned photoresist layer is then laterally etched to expose the hard mask adjacent to the trenches in the SiO 2 , and the hard mask is then removed adjacent to the trenches to form a self-aligned mask for the metal plug contact openings. A patterned second photoresist mask aligned over the trenches is then used to etch the contact openings in the trenches, using the hard mask to form T-shaped plug contact openings to the first level of interconnections. The trenches and plug contact openings are concurrently filled with CVD aluminum and chem/mech polished back to form the second level of interconnections with T-shaped metal plugs. The T-shaped metal plugs improve the edge coverage while making it easier to fill the narrow contact openings with aluminum without voids in the metal plugs.
Inventors
- 👤 Horng-Huei Tseng
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 13:59
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/73; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/084; H10W20/088
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
341 words
A method for fabricating concurrently planar metal interconnections and metal plugs on a substrate comprising the steps of: depositing a first insulating layer on said substrate; depositing a first conducting layer on said first insulating layer; patterning said first conducting layer forming a first level of interconnections; depositing a second insulating layer on said patterned first conducting layer; planarizing said second insulating layer; depositing a hard-mask film as an etch stop layer; coating a first photoresist layer on said hard-mask film; patterning said first photoresist layer to form open regions having vertical sidewalls where said metal interconnections are desired; anisotropic plasma etching in said openings removing said hard-mask film and partially etching into said second insulating layer forming trenches with vertical sidewalls; isotropically plasma etching said first photoresist layer and thereby laterally and controllably removing portions of said sidewalls of said patterned first photoresist layer and exposing regions of said hard-mask film adjacent to said trenches, said regions being self-aligned to said trenches; selectively removing portions of said exposed hard-mask film adjacent to said trenches in said second insulating layer; removing said first photoresist layer; depositing a second photoresist layer; patterning said second photoresist layer forming openings for plug contact openings over said trench areas where metal plug contacts are desired to said patterned first conducting layer and said openings extending over and exposing the edge of said hard-mask film self-aligned to said trenches; anisotropically and selectively plasma etching in said plug contact openings further recessing said trenches in said second insulating layer having vertical sidewalls aligned to said edge of said hard-mask film and said plug contact openings extending to said first conducting layer, thereby forming T-shaped plug contact openings; removing said second photoresist layer; removing remaining portions of said hard mask film; depositing a conformal second conducting layer filling said T-shaped plug contact openings and said trenches elsewhere in said second insulating layer; chemical/mechanical polishing said second conducting layer to the surface of said second insulating layer, thereby completing said planar metal interconnections and metal plugs on said substrate.
Claim 2
Independent Claim
341 words
A method for fabricating concurrently planar metal interconnections and metal plugs on a substrate comprising the steps of: depositing a first insulating layer on said substrate; depositing a first conducting layer on said first insulating layer; patterning said first conducting layer forming a first level of interconnections; depositing a second insulating layer on said patterned first conducting layer; planarizing said second insulating layer; depositing a hard-mask film as an etch stop layer; coating a first photoresist layer on said hard-mask film; patterning said first photoresist layer to form open regions having vertical sidewalls where said metal interconnections are desired; anisotropic plasma etching in said openings removing said hard-mask film and partially etching into said second insulating layer forming trenches with vertical sidewalls; isotropically plasma etching said first photoresist layer and thereby laterally and controllably removing portions of said sidewalls of said patterned first photoresist layer and exposing regions of said hard-mask film adjacent to said trenches, said regions being self-aligned to said trenches; selectively removing portions of said exposed hard-mask film adjacent to said trenches in said second insulating layer; removing said first photoresist layer; depositing a second photoresist layer; patterning said second photoresist layer forming openings for plug contact openings over said trench areas where metal plug contacts are desired to said patterned first conducting layer and said openings extending over and exposing the edge of said hard-mask film self-aligned to said trenches; anisotropically and selectively plasma etching in said plug contact openings further recessing said trenches in said second insulating layer having vertical sidewalls aligned to said edge of said hard-mask film and said plug contact openings extending to said first conducting layer, thereby forming T-shaped plug contact openings; removing said second photoresist layer; removing remaining portions of said hard mask film; depositing a conformal second conducting layer filling said T-shaped plug contact openings and said trenches elsewhere in said second insulating layer; chemical/mechanical polishing said second conducting layer to the surface of said second insulating layer, thereby completing said planar metal interconnections and metal plugs on said substrate.
Claim 3
Dependent Claim
25 words
The method of claim 1, wherein said first insulating layer is a borophosphosilicate glass (BPSG) having a thickness of between about 3000 and 8000 Angstroms.
Claim 4
Dependent Claim
26 words
The method of claim 1, wherein said first conducting layer is a refractory metal polycide layer having a thickness of between about 5000 and 7000 Angstroms.
Claim 5
Dependent Claim
15 words
The method of claim 1, wherein said second insulating layer is planarized by chemical/mechanical polishing.
Claim 6
Dependent Claim
30 words
The method of claim 4, wherein said second insulating layer is composed of a CVD silicon oxide having a thickness of between about 4000 and 8000 Angstroms after chem/mech polishing.
Claim 7
Dependent Claim
24 words
The method of claim 1, wherein said hard-mask film is composed of amorphous silicon having a thickness of between about 500 and 2000 Angstroms.
Claim 8
Dependent Claim
29 words
The method of claim 1, wherein said trenches for said metal interconnections in said second insulating layer are etched to a depth of between about 3000 and 5000 Angstroms.
Claim 9
Dependent Claim
33 words
The method of claim 1, wherein said first conducting layer is composed of a multilayer of titanium/titanium nitride and an alloy of aluminum/copper/silicon having a thickness of between about 5000 and 7000 Angstroms.
Claim 10
Dependent Claim
26 words
The method of claim 1, wherein said lateral etching of said first photoresist layer is done in a plasma etcher using oxygen as the etching gas.
Claim 11
Dependent Claim
22 words
The method of claim 1, wherein said second conducting layer is deposited to a thickness of between about 1500 and 5000 Angstroms.
Claim 12
Dependent Claim
15 words
The method of claim 1, wherein said second conducting layer is composed of aluminum (Al).
Claim 13
Dependent Claim
21 words
The method of claim 1, wherein said chemical/mechanical polishing of said second conducting layer is carried out in a polishing slurry.
Claim 14
Independent Claim
348 words
A method for fabricating concurrently planar metal interconnections and metal plugs on a semiconductor substrate for integrated circuits comprising the steps of: providing a substrate having device areas; depositing a first insulating layer on said substrate having contact openings to said device areas; depositing a first conducting layer on said first insulating layer; patterning said first conducting layer forming a first level of interconnections; depositing a second insulating layer on said patterned first conducting layer; planarizing said second insulating layer; depositing a hard-mask film; coating a first photoresist layer on said hard-mask film; patterning said first photoresist layer to form open regions having vertical sidewalls where metal interconnections are desired; anisotropic plasma etching in said openings removing said hard-mask film and partially etching into said second insulating layer forming trenches with vertical sidewalls; isotropically plasma etching said first photoresist layer and thereby laterally and controllably removing portions of said sidewalls of said patterned first photoresist layer and exposing said hard-mask film adjacent to said trenches, said exposed hard-mask film self-aligned to said trenches; selectively removing portions of said exposed hard-mask film adjacent to said trenches in said second insulating layer; removing said first photoresist layer; depositing a second photoresist layer; patterning said second photoresist layer forming openings for plug contact openings over said trench areas where metal plug contacts are desired to said patterned first conducting layer and said openings also extending over and exposing the edge of said hard-mask film; anisotropically and selectively plasma etching in said plug contact openings further recessing said trenches in said second insulating layer having vertical sidewalls aligned to said edge of said hard-mask film and said plug contact openings extending to said first conducting layer, thereby forming T-shaped plug contact openings; removing said second photoresist layer; removing remaining portion of said hard-mask film; depositing a conformal second conducting layer filling said T-shaped plug contact openings and said trenches elsewhere in said second insulating layer; chemical/mechanical polishing said second conducting layer to the surface of said second insulating layer, thereby completing said planar metal interconnections and metal plugs on said semiconductor substrate.
Claim 15
Independent Claim
348 words
A method for fabricating concurrently planar metal interconnections and metal plugs on a semiconductor substrate for integrated circuits comprising the steps of: providing a substrate having device areas; depositing a first insulating layer on said substrate having contact openings to said device areas; depositing a first conducting layer on said first insulating layer; patterning said first conducting layer forming a first level of interconnections; depositing a second insulating layer on said patterned first conducting layer; planarizing said second insulating layer; depositing a hard-mask film; coating a first photoresist layer on said hard-mask film; patterning said first photoresist layer to form open regions having vertical sidewalls where metal interconnections are desired; anisotropic plasma etching in said openings removing said hard-mask film and partially etching into said second insulating layer forming trenches with vertical sidewalls; isotropically plasma etching said first photoresist layer and thereby laterally and controllably removing portions of said sidewalls of said patterned first photoresist layer and exposing said hard-mask film adjacent to said trenches, said exposed hard-mask film self-aligned to said trenches; selectively removing portions of said exposed hard-mask film adjacent to said trenches in said second insulating layer; removing said first photoresist layer; depositing a second photoresist layer; patterning said second photoresist layer forming openings for plug contact openings over said trench areas where metal plug contacts are desired to said patterned first conducting layer and said openings also extending over and exposing the edge of said hard-mask film; anisotropically and selectively plasma etching in said plug contact openings further recessing said trenches in said second insulating layer having vertical sidewalls aligned to said edge of said hard-mask film and said plug contact openings extending to said first conducting layer, thereby forming T-shaped plug contact openings; removing said second photoresist layer; removing remaining portion of said hard-mask film; depositing a conformal second conducting layer filling said T-shaped plug contact openings and said trenches elsewhere in said second insulating layer; chemical/mechanical polishing said second conducting layer to the surface of said second insulating layer, thereby completing said planar metal interconnections and metal plugs on said semiconductor substrate.
Claim 16
Dependent Claim
25 words
The method of claim 13, wherein said first insulating layer is a borophosphosilicate glass (BPSG) having a thickness of between about 3000 and 8000 Angstroms.
Claim 17
Dependent Claim
26 words
The method of claim 13, wherein said first conducting layer is a refractory metal polycide layer having a thickness of between about 5000 and 7000 Angstroms.
Claim 18
Dependent Claim
15 words
The method of claim 13, wherein said second insulating layer is planarized by chemical/mechanical polishing.
Claim 19
Dependent Claim
30 words
The method of claim 16, wherein said second insulating layer is composed of a CVD silicon oxide having a thickness of between about 4000 and 8000 Angstroms after chem/mech polishing.
Claim 20
Dependent Claim
24 words
The method of claim 13, wherein said hard-mask film is composed of amorphous silicon having a thickness of between about 500 and 2000 Angstroms.
Claim 21
Dependent Claim
29 words
The method of claim 13, wherein said trenches for said metal interconnections in said second insulating layer are etched to a depth of between about 3000 and 5000 Angstroms.
Claim 22
Dependent Claim
33 words
The method of claim 13, wherein said first conducting layer is composed of a multilayer of titanium/titanium nitride and an alloy of aluminum/copper/silicon having a thickness of between about 5000 and 7000 Angstroms.
Claim 23
Dependent Claim
29 words
The method of claim 13, wherein said isotropic and lateral plasma etching of said first photoresist layer is done in a plasma etcher using oxygen as the etching gas.
Claim 24
Dependent Claim
22 words
The method of claim 13, wherein said second conducting layer is deposited to a thickness of between about 1500 and 5000 Angstroms.
Claim 25
Dependent Claim
15 words
The method of claim 13, wherein said second conducting layer is composed of aluminum (Al).
Claim 26
Dependent Claim
21 words
The method of claim 13, wherein said chemical/mechanical polishing of said second conducting layer is carried out in a polishing slurry.
References Cited (Backward Citations)
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2001-04-20 | 2001-10-20 | 2002-04-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-04-20 | 2005-10-20 | 2006-04-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-04-20 | 2009-10-20 | 2010-04-21 | $7700.00 | Window Closed / Lapsed |