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US5731240A Expired / Lapsed US ⏱️ 0.0 years remaining

Manufacturing method for semiconductor depositing device

Assignee: Canon Inc
•
Filing: 1995-04-04
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Granted: 1998-03-24
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Expires: 2015-04-04
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Abstract

Abstract A method of manufacturing a semiconductor device includes the steps of: depositing a semiconductor film onto a semiconductor substrate, the semiconductor film having a main component which is the same material as the semiconductor substrate; and forming a first insulating layer on the semiconductor substrate. This method also includes the steps of: removing predetermined areas from the first insulating layer and the semiconductor film so as to form an opening; forming a second insulating layer inside the opening and on the first insulating layer; and removing the second insulating layer by anisotropic etching so that the side wall of the opening remains.

Inventors

  • 👤 Yuzo Kataoka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 23:45
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/069; H10D; H10D10/00; H10D10/01; H10D10/051

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 246 words
A method for manufacturing a vertical bipolar transistor, said method comprising the sequential steps of: forming an insulating zone on a semiconductor substrate and exposing a surface of said substrate; depositing on said exposed substrate and insulating zone, a semiconductor film having electrically conductive type impurities of a first conductive type and a main component which is the same material as said substrate; forming a base zone in said semiconductor substrate by thermally diffusing electrically conductive type impurities of said first conductive type from said semiconductor film into said semiconductor substrate; forming a first insulating layer on said semiconductor film; removing zones of said first insulating layer and said semiconductor film to form an opening to said base zone; forming a second insulating layer on said first insulating layer and on the base zone in said opening; removing said second insulating layer by anisotropic etching to retain said second insulating film on an end surface of said semiconductor film in said opening; depositing a second semiconductor film on said second insulating layer, in contact with at least the second insulating layer covering said end surface and a surface of said base zone in said opening, said second semiconductor film having a main component which is a material of said semiconductor substrate and which further contains electrically conductive impurities having properties opposite to the base zone; and introducing the impurities from said second semiconductor film into the base zone by thermal diffusion to form an emitter zone.
Claim 2
Independent Claim 246 words
A method for manufacturing a vertical bipolar transistor, said method comprising the sequential steps of: forming an insulating zone on a semiconductor substrate and exposing a surface of said substrate; depositing on said exposed substrate and insulating zone, a semiconductor film having electrically conductive type impurities of a first conductive type and a main component which is the same material as said substrate; forming a base zone in said semiconductor substrate by thermally diffusing electrically conductive type impurities of said first conductive type from said semiconductor film into said semiconductor substrate; forming a first insulating layer on said semiconductor film; removing zones of said first insulating layer and said semiconductor film to form an opening to said base zone; forming a second insulating layer on said first insulating layer and on the base zone in said opening; removing said second insulating layer by anisotropic etching to retain said second insulating film on an end surface of said semiconductor film in said opening; depositing a second semiconductor film on said second insulating layer, in contact with at least the second insulating layer covering said end surface and a surface of said base zone in said opening, said second semiconductor film having a main component which is a material of said semiconductor substrate and which further contains electrically conductive impurities having properties opposite to the base zone; and introducing the impurities from said second semiconductor film into the base zone by thermal diffusion to form an emitter zone.
Claim 3
Dependent Claim 29 words
A manufacturing method according to claim 1, wherein the thickness of the second insulating film at an end surface of said semiconductor film ranges from 2000 to 5000 Å.
Claim 4
Dependent Claim 17 words
A semiconductor device manufacturing method according to claim 1, wherein said semiconductor film is made of polysilicon.
Claim 5
Independent Claim 189 words
A method for manufacturing a bipolar transistor comprising a base zone, a collector zone, and an emitter zone within a single crystalline silicon semiconductor substrate having a field oxidized film, comprising the sequential steps of: depositing, in turn, a polysilicon film having impurities for forming the base zone and a first silicon oxide onto said semiconductor substrate; diffusing impurities contained in said polysilicon film into said semiconductor substrate through thermal diffusion; forming an opening by removing a zone of each of said deposited polysilicon film and first silicon oxide to expose a surface of said semiconductor substrate; covering an end surface portion of said first silicon oxide and said polysilicon film defining said opening and said surface of the semiconductor substrate with a second silicon oxide; etching said second silicon oxide by anisotropic etching to expose said surface of the semiconductor substrate to form an emitter zone, said second silicon oxide covering said end surface of said polysilicon film after etching; and introducing impurities having a different conductive type from the impurities of said polysilicon film using said second silicon oxide as a mask to form the emitter zone.
Claim 6
Independent Claim 189 words
A method for manufacturing a bipolar transistor comprising a base zone, a collector zone, and an emitter zone within a single crystalline silicon semiconductor substrate having a field oxidized film, comprising the sequential steps of: depositing, in turn, a polysilicon film having impurities for forming the base zone and a first silicon oxide onto said semiconductor substrate; diffusing impurities contained in said polysilicon film into said semiconductor substrate through thermal diffusion; forming an opening by removing a zone of each of said deposited polysilicon film and first silicon oxide to expose a surface of said semiconductor substrate; covering an end surface portion of said first silicon oxide and said polysilicon film defining said opening and said surface of the semiconductor substrate with a second silicon oxide; etching said second silicon oxide by anisotropic etching to expose said surface of the semiconductor substrate to form an emitter zone, said second silicon oxide covering said end surface of said polysilicon film after etching; and introducing impurities having a different conductive type from the impurities of said polysilicon film using said second silicon oxide as a mask to form the emitter zone.
Claim 7
Dependent Claim 23 words
A manufacturing method according to claim 4, further comprising the step of forming an emitter electrode by a metal chemical vapor deposition technique.
Claim 8
Dependent Claim 49 words
A manufacturing method according to claim 5, wherein said metal chemical vapor deposition technique is an aluminum chemical vapor deposition technique in which dimethyl aluminum hydride serves as a main raw material gas, wherein said technique is used to deposit the metal layer having Al as a main component.
Claim 9
Dependent Claim 35 words
A manufacturing method according to claim 4, wherein the lateral thickness of said second silicon oxide covering the side wall of said first silicon oxide and said polysilicon film ranges from 2,000 to 5,000 Å.
Claim 10
Dependent Claim 23 words
A manufacturing method according to claim 4, wherein the introduction of the impurities for forming said emitter zone is performed by ion implanting.
Claim 11
Dependent Claim 45 words
A manufacturing method according to claim 4, wherein the introduction of the impurities for forming said emitter zone is performed by heat diffusion from a film having silicon as a main component and an impurity for forming an emitter zone, provided on said emitter zone.
Claim 12
Independent Claim 255 words
A method for manufacturing a vertical bipolar transistor wherein said vertical bipolar transistor has a base, an emitter, and a collector zone, said method comprising the sequential steps of: preparing a semiconductor substrate of a first conductive type; depositing a semiconductor film containing impurities of a second conductive type opposite to said first conductive type onto a semiconductor substrate, said semiconductor film having a main component which is the same material as the semiconductor substrate; forming a base zone by thermally diffusing the impurities of said second semiconductor type from said semiconductor film into said semiconductor substrate; forming a first insulating layer on said semiconductor substrate; removing a zone of each of said semiconductor film and said first insulating layer to expose a zone of the base zone of the semiconductor substrate to form an opening; forming a second insulating layer on the remaining portion of said first insulating layer and on side portions of the semiconductor film and the first insulating layer exposed within said opening; removing a part of said second insulating layer by anisotropic etching to provide a cover of second insulating layer on said side portions of the semiconductor film and first insulating layer; forming an emitter zone by implanting ions into the exposed zone of the semiconductor substrate using said second insulating layer as a mask; and forming an emitter electrode connected to said emitter zone, said emitter electrode having a laminated structure composed of metal having a high melting point and another metal having aluminum as a main component.
Claim 13
Independent Claim 255 words
A method for manufacturing a vertical bipolar transistor wherein said vertical bipolar transistor has a base, an emitter, and a collector zone, said method comprising the sequential steps of: preparing a semiconductor substrate of a first conductive type; depositing a semiconductor film containing impurities of a second conductive type opposite to said first conductive type onto a semiconductor substrate, said semiconductor film having a main component which is the same material as the semiconductor substrate; forming a base zone by thermally diffusing the impurities of said second semiconductor type from said semiconductor film into said semiconductor substrate; forming a first insulating layer on said semiconductor substrate; removing a zone of each of said semiconductor film and said first insulating layer to expose a zone of the base zone of the semiconductor substrate to form an opening; forming a second insulating layer on the remaining portion of said first insulating layer and on side portions of the semiconductor film and the first insulating layer exposed within said opening; removing a part of said second insulating layer by anisotropic etching to provide a cover of second insulating layer on said side portions of the semiconductor film and first insulating layer; forming an emitter zone by implanting ions into the exposed zone of the semiconductor substrate using said second insulating layer as a mask; and forming an emitter electrode connected to said emitter zone, said emitter electrode having a laminated structure composed of metal having a high melting point and another metal having aluminum as a main component.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-03-23 2001-09-22 2002-03-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-03-23 2005-09-22 2006-03-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-03-23 2009-09-22 2010-03-24 $7700.00 Window Closed / Lapsed

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