EP0096155A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Transistor having emitter self-aligned with an extrinsic base contact and method of making it
Assignee: International Business Machines Corp
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Filing: 1983-02-23
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Granted: —
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Expires: 2003-02-23
Abstract
Abstract A vertical bipolar transistor structure has an extrinsic base region (4) covered by a metal silicide (eg WSi 2 ) layer (6) and a doped (eg with boron) polysilicon layer (7). The metal silicide and polysilicon layers (6, 7) have an opening therein with which the emitter (3) and intrinsic base region (2) of the transistor are aligned. The vertical bipolar transistor structure can be produced by a method including delimiting a transistor area in a semiconductor substrate, depositing in succession over the the transistor area a silicide layer (6), a doped polysilicon layer (7) and a silicon dioxide layer (8), forming an aperture through the silicon dioxide, the doped polysilicon and the silicide layers, forming an insulating layer (8A) over the transistor area and driving in dopant from the polysilicon layer to form an extrinsic base region (4), removing the insulating layer from the base of the aperture but not from the sidewall of the aperture and forming an intrinsic base region and an emitter aligned with the aperture and the extrinsic base region.
Inventors
- 👤 Randall Duane Isaac
- 👤 Tak Hung Ning
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 03:07
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D62/00; H10D62/10; H10D62/17; H10D62/177; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; Y; Y10; Y10S; Y10S148/00; Y10S148/035
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
60 words
A vertical bipolar transistor structure including an extrinsic base region (4) covered by a metal silicide layer (6), the metal silicide layer (6) having an opening therein with which the emitter (3) and intrinsic base region (2) of the transistor are aligned, characterised by further including a doped polysilicon layer (7) covering and contiguous with the metal silicide layer (6).
Claim 2
Dependent Claim
60 words
A vertical bipolar transistor structure including an extrinsic base region (4) covered by a metal silicide layer (6), the metal silicide layer (6) having an opening therein with which the emitter (3) and intrinsic base region (2) of the transistor are aligned, characterised by further including a doped polysilicon layer (7) covering and contiguous with the metal silicide layer (6).
Claim 3
Dependent Claim
28 words
A bipolar transistor structure as claimed in Claim 1, in which the metal silicide is tungsten silicide (WSi 2 ) and the polysilicon layer is doped with boron.
Claim 4
Dependent Claim
218 words
A bipolar transistor structure comprising a. an n-type silicon pedestal forming the collector region limited in area by a circumscribing silicon dioxide region; b. a metal silicide layer covering the transistor area and having an aperture within the area of the pedestal; c. a p polysilicon layer covering said metal silicide layer and having the same aperture; + d. a p doped extrinsic base region located underneath said metal silicide layer, and in the region of the pedestal in the area, complementary to the aperture, and formed by drive-in of the dopant from the p + polysilicon layer through the related region of the metal silicide layer the polysilicon and metal silicide layers serving as a contact to the extrinsic base region + e. an insulating layer covering the surface of said p polysilicon layer and the edges of said p polysilicon layer and said metal silicide layer at the apertures; f an n + doped emitter region in the region of the pedestal defined by the aperture and a p-type intrinsic base region underneath the said emitter region; and g. an emitter contact covering said emitter region and insulated from said p + polysilicon layer and from the edges of said p + polysilicon layer and said metal silicide layer at the aperture by said insulating layer.
Claim 5
Dependent Claim
218 words
A bipolar transistor structure comprising a. an n-type silicon pedestal forming the collector region limited in area by a circumscribing silicon dioxide region; b. a metal silicide layer covering the transistor area and having an aperture within the area of the pedestal; c. a p polysilicon layer covering said metal silicide layer and having the same aperture; + d. a p doped extrinsic base region located underneath said metal silicide layer, and in the region of the pedestal in the area, complementary to the aperture, and formed by drive-in of the dopant from the p + polysilicon layer through the related region of the metal silicide layer the polysilicon and metal silicide layers serving as a contact to the extrinsic base region + e. an insulating layer covering the surface of said p polysilicon layer and the edges of said p polysilicon layer and said metal silicide layer at the apertures; f an n + doped emitter region in the region of the pedestal defined by the aperture and a p-type intrinsic base region underneath the said emitter region; and g. an emitter contact covering said emitter region and insulated from said p + polysilicon layer and from the edges of said p + polysilicon layer and said metal silicide layer at the aperture by said insulating layer.
Claim 6
Independent Claim
118 words
A method of producing a vertical bipolar transistor structure having an emitter self-aligned with an extrinsic base contact comprising delimiting a transistor area in a semiconductor substrate, depositing in succession over the the transistor area a silicide layer, a doped polysilicon layer and a silicon dioxide layer, forming an aperture through the silicon dioxide, the doped polysilicon and the silicide layers, forming an insulating layer over the transistor area and driving in dopant from the polysilicon layer to form an extrinsic base region, removing the insulating layer from thebase of the aperture but not from the sidewall of the aperture and forming an intrinsic base region and an emitter aligned with the aperture and the extrinsic base region.
Claim 7
Independent Claim
118 words
A method of producing a vertical bipolar transistor structure having an emitter self-aligned with an extrinsic base contact comprising delimiting a transistor area in a semiconductor substrate, depositing in succession over the the transistor area a silicide layer, a doped polysilicon layer and a silicon dioxide layer, forming an aperture through the silicon dioxide, the doped polysilicon and the silicide layers, forming an insulating layer over the transistor area and driving in dopant from the polysilicon layer to form an extrinsic base region, removing the insulating layer from thebase of the aperture but not from the sidewall of the aperture and forming an intrinsic base region and an emitter aligned with the aperture and the extrinsic base region.
References Cited (Backward Citations)
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