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US5731216A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of making an active matrix display incorporating an improved TFT

Assignee: SK Hynix America Inc
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Filing: 1996-03-27
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Granted: 1998-03-24
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Expires: 2016-03-27
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Abstract

Abstract Improved multilayer matrix line including inverted gate thin film matrix transistors to reduce defects in and enhance performance of matrix devices incorporating the transistors, including active matrix displays. The inverted gate line is formed in a multilayer metal structure deposited sequentially before patterning of a first bottom refractory layer, an aluminum layer and a second refractory layer for the gate structure. The aluminum layer is anodized adjacent the gate to prevent step coverage problems. A further improvement is provided when forming an active matrix display storage capacitor utilizing the multilayer gate structure.

Inventors

  • 👤 Scott H. Holmberg
  • 👤 Rajesh Swaminathan

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 19:20
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6725; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0316; H10D30/0321; H10D86/00; H10D86/40; H10D86/441; H10D86/60; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/136286; G02F1/13629

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 79 words
A method of manufacturing improved inverted gate thin film matrix transistors, the improvement comprising: forming a multilayer gate onto an insulating substrate, including forming a first refractory metal layer on said substrate, forming an aluminum layer onto said first layer, forming a second refractory metal layer onto said aluminum layer; patterning said second refractory metal layer to form said gate; anodizing said aluminum layer to prevent step coverage problems in succeeding layers; and anodizing said first refractory metal layer.
Claim 2
Independent Claim 79 words
A method of manufacturing improved inverted gate thin film matrix transistors, the improvement comprising: forming a multilayer gate onto an insulating substrate, including forming a first refractory metal layer on said substrate, forming an aluminum layer onto said first layer, forming a second refractory metal layer onto said aluminum layer; patterning said second refractory metal layer to form said gate; anodizing said aluminum layer to prevent step coverage problems in succeeding layers; and anodizing said first refractory metal layer.
Claim 3
Dependent Claim 18 words
The method as defined in claim 1 including forming said first and second refractory metal layers from tantalum.
Claim 4
Dependent Claim 16 words
The method as defined in claim 1 including forming said aluminum layer from an aluminum alloy.
Claim 5
Dependent Claim 18 words
The method as defined in claim 1 including forming a dielectric layer on said second refractory metal layer.
Claim 6
Dependent Claim 14 words
The method as defined in claim 4 including anodizing said second refractory metal layer.
Claim 7
Independent Claim 74 words
A method of manufacturing improved matrices, the improvement comprising: forming a multilayer line onto an insulating substrate, including forming a first refractory metal layer on said substrate, forming an aluminum layer onto said first layer, forming a second refractory metal layer onto said aluminum layer; patterning said second refractory metal layer to form said line; anodizing said aluminum layer to prevent step coverage problems in succeeding layers; and anodizing said first refractory metal layer.
Claim 8
Independent Claim 74 words
A method of manufacturing improved matrices, the improvement comprising: forming a multilayer line onto an insulating substrate, including forming a first refractory metal layer on said substrate, forming an aluminum layer onto said first layer, forming a second refractory metal layer onto said aluminum layer; patterning said second refractory metal layer to form said line; anodizing said aluminum layer to prevent step coverage problems in succeeding layers; and anodizing said first refractory metal layer.
Claim 9
Dependent Claim 18 words
The method as defined in claim 6 including forming said first and second refractory metal layers from tantalum.
Claim 10
Dependent Claim 16 words
The method as defined in claim 6 including forming said aluminum layer from an aluminum alloy.
Claim 11
Dependent Claim 18 words
The method as defined in claim 6 including forming a dielectric layer on said second refractory metal layer.
Claim 12
Dependent Claim 14 words
The method as defined in claim 9 including anodizing said second refractory metal layer.
Claim 13
Dependent Claim 29 words
The method as defined in claim 6 including forming an active matrix display, including forming a plurality of non linear control elements, each coupling a pixel to said line.
Claim 14
Dependent Claim 29 words
The method as defined in claim 11 including forming said control element as an inverted gate thin film transistor and utilizing said multilayer line as said transistor gate line.
Claim 15
Dependent Claim 35 words
The method as defined in claim 12 including forming a storage capacitor for each of the pixels and coupling said storage capacitor between each said pixel and one of an adjacent row or column line.
Claim 16
Dependent Claim 22 words
The method as defined in claim 13 including forming said storage capacitor as a portion of said adjacent row or column line.
Claim 17
Dependent Claim 33 words
The method as defined in claim 14 including forming said storage capacitor from a portion of said adjacent row line including forming said row line with said gate as a multilayer row line.
Claim 18
Dependent Claim 28 words
The method as defined in claim 15 including forming a dielectric layer over said second refractory layer and forming a metal oxide capacitor contact on said dielectric layer.

References Cited (Backward Citations)

US5498573A Cited
US5340758A Cited
US5240868A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-03-23 2001-09-22 2002-03-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-03-23 2005-09-22 2006-03-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-03-23 2009-09-22 2010-03-24 $7700.00 Window Closed / Lapsed

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