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US5716875A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for making a ferroelectric device

Assignee: NXP USA Inc
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Filing: 1996-03-01
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Granted: 1998-02-10
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Expires: 2016-03-01
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Abstract

Abstract A method for forming CMOS transistors and ferroelectric capacitors on a single substrate (10) with improved yield begins by forming CMOS transistors (37a, 37b, 40, 42). A hydrogen anneal using 4-5% hydrogen and a remainder nitrogen is performed to reduce dangling atomic bonds at the gate dielectric/substrate interface of the transistors (37a, 37b, 40, 42). A silicon nitride layer (48) is then deposited over the transistors and on the backside of the wafer substrate (10) in order to substantially encapsulate the effects of the hydrogen anneal to the CMOS transistors (37a, 37b, 40, 42). Ferroelectric capacitor layers (54, 58, 60, 62, 64) are formed overlying the nitride layer (48) where the ferroelectric capacitor layers (54, 58, 60, 62, 64) are oxygen annealed in pure O 2 . The nitride layer (48) prevents the transistor hydrogen anneal from damaging the ferroelectric material by containing the hydrogen.

Inventors

  • 👤 Robert E. Jones, Jr.
  • 👤 Peir-Yung Chu
  • 👤 Peter Zurcher
  • 👤 Ajay Jain

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 02:49
CPC Classifications
H; H10; H10B; H10B53/00; H10B53/30; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/811; H10D88/00; H10D88/01; H10D84/813

Claims Analysis

Total Claims: 32
Claim 1
Independent Claim 73 words
A method for forming a semiconductor device, the method comprising the steps of: providing a substrate; forming a plurality of transistors overlying the substrate; exposing the plurality of transistors to a hydrogen anneal; forming a barrier layer overlying the plurality of transistors; forming ferroelectric devices overlying the barrier layer; exposing the ferroelectric devices to an oxygen anneal; and wherein the barrier layer prevents the hydrogen anneal from significantly adversely affecting the ferroelectric devices.
Claim 2
Independent Claim 73 words
A method for forming a semiconductor device, the method comprising the steps of: providing a substrate; forming a plurality of transistors overlying the substrate; exposing the plurality of transistors to a hydrogen anneal; forming a barrier layer overlying the plurality of transistors; forming ferroelectric devices overlying the barrier layer; exposing the ferroelectric devices to an oxygen anneal; and wherein the barrier layer prevents the hydrogen anneal from significantly adversely affecting the ferroelectric devices.
Claim 3
Dependent Claim 41 words
The method of claim 1 wherein the step of forming ferroelectric devices overlying the barrier layer comprises: forming the ferroelectric devices as ferroelectric capacitors which are selectively coupled to selected transistors within the plurality of transistors to form nonvolatile memory cells.
Claim 4
Dependent Claim 53 words
The method of claim 2 wherein the step of forming the ferroelectric devices as ferroelectric capacitors comprises: forming contact openings through the barrier layer between the ferroelectric capacitors and the selected transistors; and forming an electrical contact between the ferroelectric capacitors and the selected transistors, the electrical contact comprising a tantalum nitride portion.
Claim 5
Dependent Claim 23 words
The method of claim 1 wherein the step of forming a barrier layer comprises: forming the barrier layer as a silicon nitride layer.
Claim 6
Dependent Claim 42 words
The method of claim 1 wherein the semiconductor device is formed on a semiconductor wafer and the step of forming a barrier layer comprises: depositing the barrier layer both overlying the plurality of transistors and adjacent a sidewall of the semiconductor wafer.
Claim 7
Dependent Claim 51 words
The method of claim 1 wherein the semiconductor device is formed on a semiconductor wafer and the step of forming a barrier layer comprises: depositing the barrier layer both overlying the plurality of transistors on a top surface of the semiconductor wafer and adjacent a back surface of the semiconductor wafer.
Claim 8
Dependent Claim 75 words
The method of claim 1 wherein the step of forming ferroelectric devices comprises: forming the ferroelectric devices wherein the ferroelectric devices comprise a material selected from a group consisting of: lead zirconate titanate (PZT), barium titanate, calcium titanate, bismuth titanate, strontium titanate, lead zirconate, lead lanthanum zirconate titanate, lead niobium zirconate titanate, lead lanthanum niobium zirconate titanate, strontium bismuth tantalum oxide (Y1), strontium bismuth niobate, strontium bismuth niobate tantalate, barium strontium titanate, and lead titanate.
Claim 9
Dependent Claim 30 words
The method of claim 1 wherein the step of forming ferroelectric devices comprises: forming the ferroelectric devices wherein the ferroelectric devices comprise a region of ferroelectric strontium bismuth tantalum oxide.
Claim 10
Dependent Claim 39 words
The method of claim 1 wherein the step of forming ferroelectric devices comprises: forming the ferroelectric devices as capacitors having two capacitor electrodes wherein one of the two capacitor electrodes comprises a titanium oxide region and a platinum region.
Claim 11
Dependent Claim 33 words
The method of claim 1 wherein the step of exposing the plurality of transistors to a hydrogen anneal comprises: exposing the plurality of transistors to an ambient environment which comprises hydrogen and nitrogen.
Claim 12
Dependent Claim 32 words
The method of claim 10 wherein the step of exposing the plurality of transistors to a hydrogen anneal comprises: heating the ambient environment to a temperature between 300° C. and 450° C.
Claim 13
Dependent Claim 37 words
The method of claim 1 wherein the step of exposing the plurality of transistors to a hydrogen anneal comprises: exposing the plurality of transistors to an ambient environment which contains 4-5% hydrogen and a remainder of nitrogen.
Claim 14
Dependent Claim 39 words
The method of claim 12 wherein the step of exposing the plurality of transistors to a hydrogen anneal comprises: using hydrogen in the ambient environment to bind dangling Si bonds at a gate-oxide-to-substrate interface of the plurality of transistors.
Claim 15
Dependent Claim 52 words
The method of claim 1 wherein a first subset of the plurality of transistors are used to form a microcontroller central processing unit (CPU) and a second subset of the plurality of transistors are coupled to the ferroelectric devices to form a ferroelectric memory array for the microcontroller central processing unit (CPU).
Claim 16
Dependent Claim 23 words
The method of claim 1 wherein the plurality of transistors contain both NMOS transistors and PMOS transistors in order to form CMOS circuitry.
Claim 17
Dependent Claim 20 words
The method of claim 1 wherein the step of providing a substrate comprises: providing a silicon on insulator (SOI) substrate.
Claim 18
Independent Claim 101 words
A method for forming a semiconductor device, the method comprising the steps of: providing a substrate; forming a plurality of CMOS transistors overlying the substrate wherein the plurality of CMOS transistors have a gate-oxide-to-substrate interface; annealing the plurality of CMOS transistors using a hydrogen anneal comprising 3-7% hydrogen and a remainder nitrogen to bind atomic dangling Si bonds at the gate-oxide-to-substrate interface; encapsulating the plurality of CMOS transistors via a silicon nitride barrier layer; and forming ferroelectric capacitors overlying the silicon nitride barrier layer wherein the silicon nitride barrier layer protects the ferroelectric capacitors from adverse affects of the hydrogen anneal.
Claim 19
Independent Claim 101 words
A method for forming a semiconductor device, the method comprising the steps of: providing a substrate; forming a plurality of CMOS transistors overlying the substrate wherein the plurality of CMOS transistors have a gate-oxide-to-substrate interface; annealing the plurality of CMOS transistors using a hydrogen anneal comprising 3-7% hydrogen and a remainder nitrogen to bind atomic dangling Si bonds at the gate-oxide-to-substrate interface; encapsulating the plurality of CMOS transistors via a silicon nitride barrier layer; and forming ferroelectric capacitors overlying the silicon nitride barrier layer wherein the silicon nitride barrier layer protects the ferroelectric capacitors from adverse affects of the hydrogen anneal.
Claim 20
Dependent Claim 48 words
The method of claim 17 wherein the semiconductor device is formed on a top surface of a semiconductor wafer and the step of encapsulating comprises: forming the silicon nitride barrier layer on both the top surface of the semiconductor wafer and a back surface of the semiconductor wafer.
Claim 21
Dependent Claim 47 words
The method of claim 17 further comprising: annealing the ferroelectric capacitors in an oxygen ambient within a temperature range of 300° C. to 500° C. to improve yield of the ferroelectric capacitors, the silicon nitride barrier layer protecting the plurality of CMOS transistors from the oxygen ambient.
Claim 22
Dependent Claim 43 words
The method of claim 17 further comprising: forming contact openings between selected CMOS transistors among the plurality of CMOS transistors and the ferroelectric capacitors; and electrically coupling the selected CMOS transistors to the ferroelectric capacitors via a conductive material which comprises tantalum nitride.
Claim 23
Dependent Claim 24 words
The method of claim 17 wherein the step of providing a substrate comprises: providing a substrate that is a silicon on insulator substrate (SOI).
Claim 24
Independent Claim 127 words
A method for forming a semiconductor device, the method comprising the steps of: providing a substrate; forming a plurality of CMOS transistors overlying the substrate wherein the plurality of CMOS transistors have a gate-oxide-to-substrate interface; annealing the plurality of CMOS transistors via a hydrogen anneal; encapsulating the plurality of CMOS transistors via a silicon nitride barrier layer; forming ferroelectric capacitors overlying the silicon nitride barrier layer wherein the silicon nitride barrier layer protects the ferroelectric capacitors from adverse affects of the hydrogen anneal and; annealing the ferroelectric capacitors in an oxygen ambient within a temperature range of 300° C. to 500° C. to improve yield of the ferroelectric capacitors, the silicon nitride barrier layer protecting the plurality of CMOS transistors from adverse affects of the oxygen ambient.
Claim 25
Independent Claim 127 words
A method for forming a semiconductor device, the method comprising the steps of: providing a substrate; forming a plurality of CMOS transistors overlying the substrate wherein the plurality of CMOS transistors have a gate-oxide-to-substrate interface; annealing the plurality of CMOS transistors via a hydrogen anneal; encapsulating the plurality of CMOS transistors via a silicon nitride barrier layer; forming ferroelectric capacitors overlying the silicon nitride barrier layer wherein the silicon nitride barrier layer protects the ferroelectric capacitors from adverse affects of the hydrogen anneal and; annealing the ferroelectric capacitors in an oxygen ambient within a temperature range of 300° C. to 500° C. to improve yield of the ferroelectric capacitors, the silicon nitride barrier layer protecting the plurality of CMOS transistors from adverse affects of the oxygen ambient.
Claim 26
Dependent Claim 48 words
The method of claim 22 wherein the semiconductor device is formed on a top surface of a semiconductor wafer and the step of encapsulating comprises: forming the silicon nitride barrier layer on both the top surface of the semiconductor wafer and a back surface of the semiconductor wafer.
Claim 27
Dependent Claim 43 words
The method of claim 22 further comprising: forming contact openings between selected CMOS transistors among the plurality of CMOS transistors and the ferroelectric capacitors; and electrically coupling the selected CMOS transistors to the ferroelectric capacitors via a conductive material which comprises tantalum nitride.
Claim 28
Dependent Claim 24 words
The method of claim 22 wherein the step of providing a substrate comprises: providing a substrate that is a silicon on insulator substrate (SOI).
Claim 29
Independent Claim 88 words
A method for forming a ferroelectric device, the method comprising the steps of: forming a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material separating the first electrode and the second electrode; forming a dielectric layer over the ferroelectric capacitor; forming at least one metal contact to one of either the first electrode or the second electrode of the ferroelectric capacitor; and exposing the ferroelectric material to an oxygen anneal to repair the ferroelectric material after the at least one metal contact is formed.
Claim 30
Independent Claim 88 words
A method for forming a ferroelectric device, the method comprising the steps of: forming a ferroelectric capacitor having a first electrode, a second electrode, and a ferroelectric material separating the first electrode and the second electrode; forming a dielectric layer over the ferroelectric capacitor; forming at least one metal contact to one of either the first electrode or the second electrode of the ferroelectric capacitor; and exposing the ferroelectric material to an oxygen anneal to repair the ferroelectric material after the at least one metal contact is formed.
Claim 31
Dependent Claim 30 words
The method of claim 26 wherein the step of forming at least one metal contact comprises: forming the at least one metal contact from a metal material which comprises aluminum.
Claim 32
Dependent Claim 45 words
The method of claim 26 further comprising: forming at least one transistor before forming the ferroelectric capacitor; annealing the at least one transistor in an environment which contains hydrogen; and depositing a nitride layer to contain the hydrogen from substantial access to the ferroelectric material.

References Cited (Backward Citations)

US5418179A Cited
US5554559A Cited
US5401680A Cited

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