US5708291A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Silicide agglomeration fuse device
Assignee: Intel Corp
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Filing: 1995-09-29
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Granted: 1998-01-13
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Expires: 2015-09-29
Abstract
Abstract A fusible link device disposed on a semiconductor substrate for providing discretionary electrical connections. The fusible link device of the invention includes a silicide layer and a polysilicon layer formed on the silicide layer and has a first un-programmed resistance. The silicide layer agglomerates to form an electrical discontinuity in response to a predetermined programming potential being applied across the silicide layer, such that the resistance of the fusible link device can be selectively increased to a second programmed resistance.
Inventors
- 👤 Mark T. Bohr
- 👤 Mohsen Alavi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 19:46
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
98 words
A fusible link device disposed on a semiconductor substrate for providing discretionary electrical connections, the fusible link device comprising: a polysilicon layer having a first resistance; a silicide layer formed on the polysilicon layer, the silicide layer having a second resistance lower than the first resistance, the silicide layer agglomerating to form an electrical discontinuity in response to a predetermined programming potential being applied across the silicide layer, such that the resistance of the fusible link device can be selectively increased; and nine contacts electrically coupled to either end of the silicide layer for receiving the programming potential.
Claim 2
Dependent Claim
98 words
A fusible link device disposed on a semiconductor substrate for providing discretionary electrical connections, the fusible link device comprising: a polysilicon layer having a first resistance; a silicide layer formed on the polysilicon layer, the silicide layer having a second resistance lower than the first resistance, the silicide layer agglomerating to form an electrical discontinuity in response to a predetermined programming potential being applied across the silicide layer, such that the resistance of the fusible link device can be selectively increased; and nine contacts electrically coupled to either end of the silicide layer for receiving the programming potential.
Claim 3
Dependent Claim
82 words
A fuse disposed on a semiconductor substrate, and having a first un-programmed resistance, the fuse comprising: a polysilicon layer; a silicide layer formed on the polysilicon layer, the silicide layer agglomerating to form an electrical discontinuity in response to a predetermined programming potential being applied across the silicide, layer, such that the resistance of the fuse can be selectively increased to a second programmed resistance; and nine contacts electrically coupled to either end of the silicide layer for receiving the programming potential.
Claim 4
Dependent Claim
82 words
A fuse disposed on a semiconductor substrate, and having a first un-programmed resistance, the fuse comprising: a polysilicon layer; a silicide layer formed on the polysilicon layer, the silicide layer agglomerating to form an electrical discontinuity in response to a predetermined programming potential being applied across the silicide, layer, such that the resistance of the fuse can be selectively increased to a second programmed resistance; and nine contacts electrically coupled to either end of the silicide layer for receiving the programming potential.
Claim 5
Dependent Claim
110 words
A fusible link device disposed on a semiconductor substrate for providing discretionary electrical connections, the fusible link device comprising: a polysilicon layer having a first resistance, the polysilicon layer including a first region doped n-type and at least a second region doped p-type to form at least one p-n junction in the polysilicon layer; and a silicide layer formed on the polysilicon layer, the silicide layer having a second resistance lower than the first resistance, the silicide layer agglomerating to form an electrical discontinuity in response to a predetermined programming potential being applied across the silicide layer, such that the resistance of the fusible link device can be selectively increased.
Claim 6
Dependent Claim
110 words
A fusible link device disposed on a semiconductor substrate for providing discretionary electrical connections, the fusible link device comprising: a polysilicon layer having a first resistance, the polysilicon layer including a first region doped n-type and at least a second region doped p-type to form at least one p-n junction in the polysilicon layer; and a silicide layer formed on the polysilicon layer, the silicide layer having a second resistance lower than the first resistance, the silicide layer agglomerating to form an electrical discontinuity in response to a predetermined programming potential being applied across the silicide layer, such that the resistance of the fusible link device can be selectively increased.
Claim 7
Dependent Claim
32 words
The fusible link device as set forth in claim 1 further including at least first and second contacts electrically coupled to opposite ends of the silicide layer for receiving the programming potential.
Claim 8
Dependent Claim
16 words
The fusible link device as set forth in claim 4 wherein the contacts comprise tungsten plugs.
Claim 9
Dependent Claim
18 words
The fusible link device as set forth in claim 1 wherein the programming potential is approximately 2 volts.
Claim 10
Dependent Claim
18 words
The fusible link device as set forth in claim 1 wherein the silicide layer comprises TiSi 2 .
Claim 11
Dependent Claim
19 words
The fusible link device as set forth in claim 7 wherein the silicide layer is approximately 200-400 angstroms thick.
Claim 12
Dependent Claim
19 words
The fusible link device as set forth in claim 1 wherein the polysilicon layer is approximately 2500 angstroms thick.
Claim 13
Dependent Claim
38 words
The fusible link device as set forth in claim 1 wherein a sheet resistance of the polysilicon layer is greater than 500 ohms per square, and a sheet resistance of the silicide layer is 1-10 ohms per square.
Claim 14
Dependent Claim
30 words
The fusible link device as set forth in claim 1 wherein the polysilicon layer is formed of a polysilicon film and the silicide layer is formed of a silicide film.
Claim 15
Dependent Claim
37 words
The fusible link device as set forth in claim 1 wherein the fuse device comprises a fuse region, the fuse region having a length four to 25 times as long as a width of the fuse region.
Claim 16
Dependent Claim
21 words
The fusible link device as set forth in claim 12 wherein the width of the fuse region is approximately 0.22 microns.
Claim 17
Dependent Claim
94 words
A fuse disposed on a semiconductor substrate, and having a first un-programmed resistance, the fuse comprising: a polysilicon layer, the polysilicon layer including a first region doped n-type and at least a second region doped p-type to form at least one p-n junction in the polysilicon layer; and a silicide layer formed on the polysilicon layer, the silicide layer agglomerating to form an electrical discontinuity in response to a predetermined programming potential being applied across the silicide layer, such that the resistance of the fuse can be selectively increased to a second programmed resistance.
Claim 18
Dependent Claim
94 words
A fuse disposed on a semiconductor substrate, and having a first un-programmed resistance, the fuse comprising: a polysilicon layer, the polysilicon layer including a first region doped n-type and at least a second region doped p-type to form at least one p-n junction in the polysilicon layer; and a silicide layer formed on the polysilicon layer, the silicide layer agglomerating to form an electrical discontinuity in response to a predetermined programming potential being applied across the silicide layer, such that the resistance of the fuse can be selectively increased to a second programmed resistance.
Claim 19
Dependent Claim
25 words
The fuse as set forth in claim 14 further including first and second contacts electrically coupled to the silicide layer for receiving the programming potential.
Claim 20
Dependent Claim
14 words
The fuse as set forth in claim 15 wherein the contacts comprise tungsten plugs.
Claim 21
Dependent Claim
16 words
The fuse as set forth in claim 14 wherein the programming potential is approximately 2 volts.
Claim 22
Dependent Claim
16 words
The fuse as set forth in claim 14 wherein the silicide layer comprises TiSi 2 .
Claim 23
Dependent Claim
17 words
The fuse as set forth in claim 18 wherein the silicide layer is approximately 200-400 angstroms thick.
Claim 24
Dependent Claim
17 words
The fuse as set forth in claim 14 wherein the polysilicon layer is approximately 2500 angstroms thick.
Claim 25
Dependent Claim
22 words
The fuse as set forth in claim 14 wherein the second programmed resistance is at least 10 times the first un-programmed resistance.
Claim 26
Independent Claim
84 words
A method for forming a fuse comprising the steps of: forming a polysilicon layer on a semiconductor substrate; doping the polysilicon layer n-type; forming p-type regions in the n-type polysilicon layer such that the polysilicon layer includes at least one p-n junction; forming a silicide layer on the polysilicon layer; and forming contacts at either end of the silicide layer, the contacts being electrically coupled to the silicide layer such that a programming potential may be applied across them to program the fuse device.
Claim 27
Independent Claim
84 words
A method for forming a fuse comprising the steps of: forming a polysilicon layer on a semiconductor substrate; doping the polysilicon layer n-type; forming p-type regions in the n-type polysilicon layer such that the polysilicon layer includes at least one p-n junction; forming a silicide layer on the polysilicon layer; and forming contacts at either end of the silicide layer, the contacts being electrically coupled to the silicide layer such that a programming potential may be applied across them to program the fuse device.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-01-12 | 2001-07-14 | 2002-01-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-01-12 | 2005-07-14 | 2006-01-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-01-12 | 2009-07-14 | 2010-01-13 | $7700.00 | Window Closed / Lapsed |