Method for manufacturing polysilicon thin film transistor

Claim 1

A method for manufacturing a thin film transistor comprising the steps of: preparing a transparent substrate having a top face and a bottom face; forming a lower gate pattern on said top face of said transparent substrate; depositing a first insulating layer, a semiconductor layer, a second insulating layer, and a conducting layer successively over said lower gate pattern; forming a first photoresist layer on said conducting layer; patterning said first photoresist layer by exposing through said bottom face of said transparent substrate using said lower gate pattern as a mask; forming an upper gate pattern by etching said conducting layer using said patterned first photoresist layer as a mask, said upper gate pattern being formed so as to have a width smaller than a width of said lower gate pattern; removing said patterned first photoresist layer; forming a second photoresist layer on said upper gate pattern; patterning said second photoresist layer by exposing through said bottom face of said transparent substrate using said lower gate pattern as a mask, said second photoresist layer being patterned so that said patterned second photoresist layer has a width larger than said width of said upper gate pattern; implanting ions into said semiconductor layer utilizing said patterned second photoresist layer as a mask; and removing said patterned second photoresist layer.

Claim 2

A method for manufacturing a thin film transistor comprising the steps of: preparing a transparent substrate having a top face and a bottom face; forming a lower gate pattern on said top face of said transparent substrate; depositing a first insulating layer, a semiconductor layer, a second insulating layer, and a conducting layer successively over said lower gate pattern; forming a first photoresist layer on said conducting layer; patterning said first photoresist layer by exposing through said bottom face of said transparent substrate using said lower gate pattern as a mask; forming an upper gate pattern by etching said conducting layer using said patterned first photoresist layer as a mask, said upper gate pattern being formed so as to have a width smaller than a width of said lower gate pattern; removing said patterned first photoresist layer; forming a second photoresist layer on said upper gate pattern; patterning said second photoresist layer by exposing through said bottom face of said transparent substrate using said lower gate pattern as a mask, said second photoresist layer being patterned so that said patterned second photoresist layer has a width larger than said width of said upper gate pattern; implanting ions into said semiconductor layer utilizing said patterned second photoresist layer as a mask; and removing said patterned second photoresist layer.

Claim 4

A method for manufacturing a thin film transistor comprising the steps of: preparing a transparent substrate having a top face and a bottom face; forming a lower gate pattern on said top face of said transparent substrate; forming a first insulating layer, a semiconductor layer, a second insulating layer and a negative photoresist layer successively over said lower gate pattern; patterning said negative photoresist layer by exposing through said bottom face of said transparent substrate using said lower gate pattern as a mask; forming a conductor layer on said patterned negative photoresist layer and exposed portions of said second insulating layer; forming an upper gate pattern by removing said patterned negative photoresist layer and by removing portions of said conductor layer formed on said patterned negative photoresist layer, said upper gate pattern being formed so as to have a width smaller than a width of said lower gate pattern; forming a second photoresist layer on said upper gate pattern; patterning said second photoresist layer by exposing through said bottom face of said transparent substrate using said lower gate pattern as a mask, said second photoresist layer being patterned so that said patterned second photoresist layer has a width larger than said width of said upper gate pattern; implanting ions into said semiconductor layer utilizing said patterned second photoresist layer as a mask; and removing said patterned second photoresist layer.

Claim 5

A method for manufacturing a thin film transistor comprising the steps of: preparing a transparent substrate having a top face and a bottom face; forming a lower gate pattern on said top face of said transparent substrate; forming a first insulating layer, a semiconductor layer, a second insulating layer and a negative photoresist layer successively over said lower gate pattern; patterning said negative photoresist layer by exposing through said bottom face of said transparent substrate using said lower gate pattern as a mask; forming a conductor layer on said patterned negative photoresist layer and exposed portions of said second insulating layer; forming an upper gate pattern by removing said patterned negative photoresist layer and by removing portions of said conductor layer formed on said patterned negative photoresist layer, said upper gate pattern being formed so as to have a width smaller than a width of said lower gate pattern; forming a second photoresist layer on said upper gate pattern; patterning said second photoresist layer by exposing through said bottom face of said transparent substrate using said lower gate pattern as a mask, said second photoresist layer being patterned so that said patterned second photoresist layer has a width larger than said width of said upper gate pattern; implanting ions into said semiconductor layer utilizing said patterned second photoresist layer as a mask; and removing said patterned second photoresist layer.