US5420048A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Manufacturing method for SOI-type thin film transistor
Assignee: Canon Inc
•
Filing: 1991-12-31
•
Granted: 1995-05-30
•
Expires: 2011-12-31
Abstract
Abstract An SOI-type thin film transistor having a transparent insulating substrate a first gate electrode, a first gate insulating film, a semiconductor layer, a second gate electrode and a second gate insulating film which are respectively formed on the transparent insulating substrate, wherein the width of the first gate electrode and that of the second gate electrode are different from each other and as well as the thickness of the first gate insulating film and that of the second gate insulating film are different from each other.
Inventors
- 👤 Shigeki Kondo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 21:57
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6733; H10D30/6734; H10D30/674; Y; Y10; Y10S; Y10S148/00; Y10S148/077; Y10S148/15
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
218 words
A method of manufacturing a double gate structure SOI-type thin film transistor, comprising the steps of: (a) forming a first gate electrode on one surface of a transparent substrate; (b) forming a first gate insulating layer covering the first gate electrode; (c) forming a semiconductor layer covering the first gate insulating layer on the substrate; (d) forming a second gate insulating layer covering the semiconductor layer; (e) depositing a positive photoresist on the second gate insulating layer; (f) irradiating light selectively onto the photoresist from another surface of the transparent substrate through the substrate and the first gate electrode using the first gate electrode as a photomask, and subjecting the photoresist to a patterning process; (g) injecting an ion into the semiconductor layer using the patterned photoresist as a mask, to form a source or a drain region in the semiconductor layer; (h) removing the patterned photoresist; (i) forming a conductive layer on the second gate insulating layer; (j) depositing a positive photoresist on the conductive layer; (k) irradiating light selectively onto the photoresist from the other surface of the transparent substrate through the substrate and the first electrode using the first electrode as a photomask; and (l) patterning the photoresist, and etching the conductive layer using the patterned photoresist as the mask to form a second electrode.
Claim 2
Independent Claim
218 words
A method of manufacturing a double gate structure SOI-type thin film transistor, comprising the steps of: (a) forming a first gate electrode on one surface of a transparent substrate; (b) forming a first gate insulating layer covering the first gate electrode; (c) forming a semiconductor layer covering the first gate insulating layer on the substrate; (d) forming a second gate insulating layer covering the semiconductor layer; (e) depositing a positive photoresist on the second gate insulating layer; (f) irradiating light selectively onto the photoresist from another surface of the transparent substrate through the substrate and the first gate electrode using the first gate electrode as a photomask, and subjecting the photoresist to a patterning process; (g) injecting an ion into the semiconductor layer using the patterned photoresist as a mask, to form a source or a drain region in the semiconductor layer; (h) removing the patterned photoresist; (i) forming a conductive layer on the second gate insulating layer; (j) depositing a positive photoresist on the conductive layer; (k) irradiating light selectively onto the photoresist from the other surface of the transparent substrate through the substrate and the first electrode using the first electrode as a photomask; and (l) patterning the photoresist, and etching the conductive layer using the patterned photoresist as the mask to form a second electrode.
Claim 3
Dependent Claim
31 words
A method according to claim 1, wherein, in said irradiating step (f), the photoresist is overexposed, to reduce an area of the photoresist pattern for forming the second gate electrode pattern.
Claim 4
Dependent Claim
15 words
A method according to claim 1, wherein the first gate electrode is formed from tungsten.
Claim 5
Dependent Claim
14 words
A method according to claim 1, wherein the semiconductor layer is formed from silicon.
Claim 6
Dependent Claim
15 words
A method according to claim 1, wherein the transparent substrate is formed from a quartz.
Claim 7
Dependent Claim
17 words
A method according to claim 1, wherein the positive photoresist is deposited by a spin coat process.
Claim 8
Dependent Claim
19 words
A method according to claim 1, wherein the first gate insulator is formed from Si 3 N 4 .
Claim 9
Dependent Claim
15 words
A method according to claim 1, wherein the second gate electrode is formed from poly-silicon.
Claim 10
Dependent Claim
14 words
A method according to claim 4, wherein the silicon is formed by low-pressure CVD.
Claim 11
Dependent Claim
16 words
A method according to claim 4, wherein the silicon is polished mechanically and etched by RIE.
References Cited (Backward Citations)
US4263709A
Cited
US4727044A
Cited
US4720736A
Cited
US4954855A
Cited
JPS63107016A
Cited
US4788157A
Cited
EP0304824A2
Cited
US5032883A
Cited
US5202572A
Cited
US4951113A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-05-29 | 1998-11-28 | 1999-05-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-05-29 | 2002-11-28 | 2003-05-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-05-29 | 2006-11-28 | 2007-05-30 | $7700.00 | Window Closed / Lapsed |