US5371025A
Expired / Lapsed
US
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Method of making thin film transistors
Assignee: LG Electronics Inc
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Filing: 1992-09-03
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Granted: 1994-12-06
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Expires: 2012-09-03
Abstract
Abstract A method of making thin film transistors, capable of reducing the extent of channel overlap between a gate electrode and source/drain regions, thereby achieving an improvement in signal-to-noise ratio. The method uses a impurity ion doping process and a process for forming a silicide layer using a refractory metal, so as to form source and drain electrodes in a self-aligned manner, with respect to the gate electrode. In order to avoid a channel overlap from occurring between the gate electrode and the source and drain electrodes, a photoresist pattern is subjected to a baking, which photoresist pattern defines an insulating layer pattern serving as a channel passivation layer to determine the of a channel region and the widths of source and drain regions. By the baking, the photoresist pattern flows outwardly so that its width is approximately equal to the length of the gate electrode.
Inventors
- 👤 Kang H. Sung
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 10:44
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0312; H10D30/0316; H10D30/60; H10D30/67; H10D30/6729; H10D30/6737; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6757; H10P; H10P76/00; H10P76/20; H10P76/204; H10P76/2041
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
224 words
A method of making a thin film transistor comprising the steps of: forming a gate electrode on an insulating transparent substrate; forming a first insulating layer, an amorphous silicon layer and a second insulating layer in turn on the gate electrode and the insulting transparent substrate; coating a photoresist over the second insulating layer and performing a back substrate exposure using the gate electrode as a photo shield mask to form a photoresist pattern; baking the photoresist pattern to flow outwardly so that it has a width approximately equal to a length of the gate electrode in order to prevent a channel overlap; etching the second insulating layer using the baked photoresist pattern as a mask to form a second insulating layer pattern serving as a channel passivation layer; removing thee photoresist pattern from the second insulating layer pattern; forming an impurity-doped amorphous silicon layer in the amorphous silicon layer at opposite sides of the second insulating layer pattern; depositing a refractory metal layer on the second insulating layer pattern and the impurity-doped amorphous silicon layer and consequently forming a silicide layer between the impurity-doped amorphous silicon layer and the refractory metal layer; and patterning the refractory metal layer to form refractory metal layer patterns at opposite sides of the second insulating layer pattern to serve as a source electrode and a drain electrode.
Claim 2
Independent Claim
224 words
A method of making a thin film transistor comprising the steps of: forming a gate electrode on an insulating transparent substrate; forming a first insulating layer, an amorphous silicon layer and a second insulating layer in turn on the gate electrode and the insulting transparent substrate; coating a photoresist over the second insulating layer and performing a back substrate exposure using the gate electrode as a photo shield mask to form a photoresist pattern; baking the photoresist pattern to flow outwardly so that it has a width approximately equal to a length of the gate electrode in order to prevent a channel overlap; etching the second insulating layer using the baked photoresist pattern as a mask to form a second insulating layer pattern serving as a channel passivation layer; removing thee photoresist pattern from the second insulating layer pattern; forming an impurity-doped amorphous silicon layer in the amorphous silicon layer at opposite sides of the second insulating layer pattern; depositing a refractory metal layer on the second insulating layer pattern and the impurity-doped amorphous silicon layer and consequently forming a silicide layer between the impurity-doped amorphous silicon layer and the refractory metal layer; and patterning the refractory metal layer to form refractory metal layer patterns at opposite sides of the second insulating layer pattern to serve as a source electrode and a drain electrode.
Claim 3
Dependent Claim
26 words
A method of making a thin film transistor in accordance with claim 1, wherein the material of the first and second insulating layers is silicon nitride.
Claim 4
Dependent Claim
31 words
A method of making a thin film transistor in accordance with claim 1, wherein the material of the insulating transparent substrate is selected from the group consisting of glass and quartz.
Claim 5
Dependent Claim
34 words
A method of making a thin film transistor accordance with claim 1, wherein the material of the gate electrode is selected from a group consisting of platinum, chromium, molybdenum, aluminum and conductively dope silicon.
Claim 6
Dependent Claim
31 words
A method of making a thin film transistor accordance with claim 1, wherein the material of the refractory metal layer is selected from the group consisting of platinum, chromium and molybdenum.
Claim 7
Dependent Claim
33 words
A method of making a thin film transistor in accordance with claim 1, wherein the patternings of the second insulating layer and refractory metal layer is achieved by using a dry etching method.
Claim 8
Dependent Claim
24 words
A method of making a thin film transistor in accordance with claim 6, wherein the dry etching method is a reactive ion etching method.
Claim 9
Dependent Claim
26 words
A method of making a thin film transistor in accordance with claim 7, wherein the reactive ion etching method uses an etching gas containing no oxygen.
Claim 10
Dependent Claim
39 words
A method of making a thin film transistor in accordance with claim 1, further comprising the step of annealing the refractory metal layer after the deposition of the refractory metal layer, to increase the thickness of the silicide layer.
Claim 11
Dependent Claim
59 words
A method of making a thin film transistor accordance with claim 1, wherein the patterning of the refractory metal layer is achieved so that the widths of the refractory metal layer patterns serving as the source electrode and the drain electrode are less than those of the silicide layer disposed at opposite sides of the second insulating layer pattern.
Claim 12
Dependent Claim
31 words
A method of making a thin film transistor in accordance with claim 1, wherein the time of performing the back substrate exposure depends on the thickness of the amorphous silicon layer.
Claim 13
Independent Claim
223 words
A method of making a thin film transistor comprising the steps of: forming a gate electrode on an insulating transparent substrate; forming a first insulating layer, a polycrystalline silicon layer and a second insulating layer in turn on the gate electrode and the insulating transparent substrate; coating a photoresist over the second insulating layer and performing a back substrate exposure using the gate electrode as a photo shield mask to form a photoresist pattern; baking the photoresist pattern to flow outwardly so that it has a width approximately equal to a length of the gate electrode in order to prevent a channel overlap; etching the second insulating layer using the baked photoresist pattern as a mask to form a second insulating layer pattern serving as a channel passivation layer; removing the photoresist pattern from the second insulating pattern; forming an impurity-doped polycrystalline silicon layer in the polycrystalline silicon layer at opposite sides of the second insulating layer pattern; depositing a refractory metal layer on the second insulating layer pattern and the impurity-doped polycrystalline silicon layer and consequently forming a silicide layer between the impurity-doped polycrystalline silicon layer and the refractory metal layer; and patterning the refractory metal layer to form refractory metal layer patterns at opposite sides of the second insulating layer pattern to serve as a source electrode and a drain electrode.
Claim 14
Independent Claim
223 words
A method of making a thin film transistor comprising the steps of: forming a gate electrode on an insulating transparent substrate; forming a first insulating layer, a polycrystalline silicon layer and a second insulating layer in turn on the gate electrode and the insulating transparent substrate; coating a photoresist over the second insulating layer and performing a back substrate exposure using the gate electrode as a photo shield mask to form a photoresist pattern; baking the photoresist pattern to flow outwardly so that it has a width approximately equal to a length of the gate electrode in order to prevent a channel overlap; etching the second insulating layer using the baked photoresist pattern as a mask to form a second insulating layer pattern serving as a channel passivation layer; removing the photoresist pattern from the second insulating pattern; forming an impurity-doped polycrystalline silicon layer in the polycrystalline silicon layer at opposite sides of the second insulating layer pattern; depositing a refractory metal layer on the second insulating layer pattern and the impurity-doped polycrystalline silicon layer and consequently forming a silicide layer between the impurity-doped polycrystalline silicon layer and the refractory metal layer; and patterning the refractory metal layer to form refractory metal layer patterns at opposite sides of the second insulating layer pattern to serve as a source electrode and a drain electrode.
References Cited (Backward Citations)
US5010027A
Cited
US5130263A
Cited
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1997-12-05 | 1998-06-06 | 1998-12-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-12-05 | 2002-06-06 | 2002-12-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-12-05 | 2006-06-06 | 2006-12-06 | $7700.00 | Window Closed / Lapsed |