US5701136A
Expired / Lapsed
US
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Liquid crystal display driver with threshold voltage drift compensation
Assignee: Vantiva SA
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Filing: 1995-03-06
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Granted: 1997-12-23
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Expires: 2015-03-06
Abstract
Abstract A shift register for scanning a liquid crystal display includes cascaded stages. A given stage is formed with an input transistor switch that is responsive to an output pulse of a stage upstream in the chain of the cascaded stages. An output pulse of the given stage is produced in a pull-up transistor of a push-pull amplifier. A pull-down transistor is responsive to a control signal that tracks a variation of a threshold voltage of the pull-down transistor. A difference between the control signal and the threshold voltage is maintained small in a manner to reduce a change in a conductivity of the pull-down transistor when a drift in the threshold voltage of the pull-down transistor occurs.
Inventors
- 👤 Ruquiya Ismat Ara Huq
- 👤 Andrew Gordon Francis Dingwall
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 12:20
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/22; G11; G11C; G11C19/00; G11C19/28; G09G3/00; G09G3/20; G09G3/34; G09G3/36; G09G3/3611; G09G3/3674; G09G3/3677
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
194 words
A shift register, comprising: a source of a plurality of phase shifted clock signals; a sensor for generating a threshold voltage indicative signal; a plurality of cascaded stages, a given one of said cascaded stages, including: a first transistor of a push-pull amplifier responsive to a first clock signal of said clock signals for generating an output pulse at an output of said given stage; an input section responsive to an output pulse developed at an output of a second of said cascaded stages when a clock signal that is phase shifted with respect to said first clock signal occurs for generating a control signal at a control electrode of said first transistor, said control signal conditioning said first transistor to generate said output pulse of said given stage when an active level of said first clock signal occurs; and a second transistor of said push-pull amplifier coupled to said output of said given stage for clamping said output to an inactive level of said output pulse, said second transistor being responsive to said threshold voltage indicative signal in a manner to compensate for a change in a threshold voltage of said second transistor.
Claim 2
Dependent Claim
194 words
A shift register, comprising: a source of a plurality of phase shifted clock signals; a sensor for generating a threshold voltage indicative signal; a plurality of cascaded stages, a given one of said cascaded stages, including: a first transistor of a push-pull amplifier responsive to a first clock signal of said clock signals for generating an output pulse at an output of said given stage; an input section responsive to an output pulse developed at an output of a second of said cascaded stages when a clock signal that is phase shifted with respect to said first clock signal occurs for generating a control signal at a control electrode of said first transistor, said control signal conditioning said first transistor to generate said output pulse of said given stage when an active level of said first clock signal occurs; and a second transistor of said push-pull amplifier coupled to said output of said given stage for clamping said output to an inactive level of said output pulse, said second transistor being responsive to said threshold voltage indicative signal in a manner to compensate for a change in a threshold voltage of said second transistor.
Claim 3
Dependent Claim
26 words
A shift register according to claim 1 wherein said threshold voltage indicative signal is coupled in common to each of said plurality of said cascaded stages.
Claim 4
Dependent Claim
23 words
A shift register according to claim 1 wherein said push-pull amplifier is coupled to a row select line of a liquid crystal display.
Claim 5
Dependent Claim
23 words
A shift register according to claim 1 wherein said threshold voltage indicative signal is coupled to a control terminal of said second transistor.
Claim 6
Dependent Claim
37 words
A shift register according to claim 1 further comprising, a switching, third transistor responsive to an output pulse of a stage downstream of said given stage for applying said threshold voltage indicative signal to said second transistor.
Claim 7
Dependent Claim
38 words
A shift register according to claim 1 wherein said sensor comprises a third transistor having a threshold voltage variation that tracks said threshold voltage of said second transistor in a manner to vary said threshold voltage indicative signal.
Claim 8
Dependent Claim
41 words
A shift register according to claim 6 further comprising, a non-linear element coupled in series with said third transistor for varying said threshold voltage indicative signal in non-linear multiplicative manner with respect to said threshold voltage variation of said third transistor.
Claim 9
Dependent Claim
36 words
A shift register according to claim 7 wherein said non-linear element comprises a metal oxide semiconductor, fourth transistor responsive to a voltage developed in said third transistor for producing a channel modulation in said fourth transistor.
Claim 10
Dependent Claim
25 words
A shift register according to claim 1 wherein said first-transistor is a pull-up transistor and said second transistor is a pull-down transistor of said amplifier.
Claim 11
Dependent Claim
71 words
A liquid crystal display select line shift register integrated on a liquid crystal display substrate, including a transistor which may exhibit substantial threshold drift due to operational voltages, said shift register comprising: means for sensing a corresponding threshold drift; and means responsive to the sensed threshold drift for automatically changing a control voltage applied to said transistor to maintain a current conducting parameter of said transistor substantially constant with threshold drift.
Claim 12
Dependent Claim
71 words
A liquid crystal display select line shift register integrated on a liquid crystal display substrate, including a transistor which may exhibit substantial threshold drift due to operational voltages, said shift register comprising: means for sensing a corresponding threshold drift; and means responsive to the sensed threshold drift for automatically changing a control voltage applied to said transistor to maintain a current conducting parameter of said transistor substantially constant with threshold drift.
Claim 13
Dependent Claim
101 words
An improved shift register stage having a push-pull output with a normally non-conductive pull-up transistor and a normally conducting pull-down transistor subject to significant threshold drift and being driven by a voltage in excess of said threshold voltage, wherein the improvement comprises: sense means of similar construction to said pull-down transistor located to operate in a similar environment to track threshold voltage changes in said pull-down transistor; and means responsive to said sense means for applying a control voltage to said pull-down transistor which varies to condition said pull-down transistor to conduct substantially the same current despite threshold voltage variations therein.
Claim 14
Dependent Claim
101 words
An improved shift register stage having a push-pull output with a normally non-conductive pull-up transistor and a normally conducting pull-down transistor subject to significant threshold drift and being driven by a voltage in excess of said threshold voltage, wherein the improvement comprises: sense means of similar construction to said pull-down transistor located to operate in a similar environment to track threshold voltage changes in said pull-down transistor; and means responsive to said sense means for applying a control voltage to said pull-down transistor which varies to condition said pull-down transistor to conduct substantially the same current despite threshold voltage variations therein.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-12-22 | 2001-06-23 | 2001-12-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-12-22 | 2005-06-23 | 2005-12-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-12-22 | 2009-06-23 | 2009-12-23 | $7700.00 | Window Closed / Lapsed |