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US5700720A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing semiconductor device having multilayer interconnection

Assignee: Toshiba Corp
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Filing: 1995-12-20
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Granted: 1997-12-23
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Expires: 2015-12-20
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Abstract

Abstract According to the method of manufacturing a semiconductor device having a multilayer interconnection structure, lower wires are formed on a semiconductor substrate. Then, a first reflow SiO 2 film having a reflow form is formed on the semiconductor substrate and the lower wires by reacting SiH 4 gas with H 2 O 2 in a vacuum at 650 Pa or less within a range from -10 to 10°C. After the first reflow SiO 2 film is formed, heat treatment is performed at a predetermined high temperature on the semiconductor substrate on which the first reflow SiO 2 film, and a second reflow SiO 2 film having a reflow form is formed on the semiconductor substrate and the lower wires by reacting SiH 4 gas with H 2 O 2 in a vacuum at 650 Pa or less within a range from -10 to 10°C. The heat treatment step performed after the first reflow SiO 2 film forming step and the second reflow SiO 2 film forming step subsequent thereto are respectively performed at least once. After the abovementioned steps are finished, upper wires are formed on the second reflow SiO 2 film.

Inventors

  • 👤 Hidetsuna Hashimoto

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 01:54
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/66; H10P14/668; H10P14/6681; H10P14/6682; H10P95/00; H10W20/071; H10P14/69; H10P14/692; H10P14/6921; H10P14/69215

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 181 words
A method of manufacturing a semiconductor device having a multilayer interconnection structure comprising the steps of: forming lower wires on a semiconductor substrate; forming a first reflow SiCO 2 film having a reflow form on the semiconductor substrate and the lower wires by reacting SiH 4 gas with H 2 O 2 in a vacuum at 650 Pa or less and at a temperature within a range from -10° to 10° C.; performing a heat treatment at a high temperature on the semiconductor substrate and said first reflow SiO 2 film; forming a second reflow SiO 2 film having a reflow form on the first reflow SiO 2 film by reacting SiH 4 gas with H 2 O 2 in a vacuum at 650 Pa or less and at a temperature within a range from -10° to 10° C., said heat treatment step performed after the first reflow SiO 2 film forming step and the second reflow SiO 2 film forming step subsequent thereto being respectively performed at least once: and forming upper wires on the second reflow SiO 2 film.
Claim 2
Independent Claim 181 words
A method of manufacturing a semiconductor device having a multilayer interconnection structure comprising the steps of: forming lower wires on a semiconductor substrate; forming a first reflow SiCO 2 film having a reflow form on the semiconductor substrate and the lower wires by reacting SiH 4 gas with H 2 O 2 in a vacuum at 650 Pa or less and at a temperature within a range from -10° to 10° C.; performing a heat treatment at a high temperature on the semiconductor substrate and said first reflow SiO 2 film; forming a second reflow SiO 2 film having a reflow form on the first reflow SiO 2 film by reacting SiH 4 gas with H 2 O 2 in a vacuum at 650 Pa or less and at a temperature within a range from -10° to 10° C., said heat treatment step performed after the first reflow SiO 2 film forming step and the second reflow SiO 2 film forming step subsequent thereto being respectively performed at least once: and forming upper wires on the second reflow SiO 2 film.
Claim 3
Dependent Claim 28 words
A method according to claim 1, wherein the heat treatment is performed at a temperature within a range of 100°-500° C. in an atmosphere of an inert gas.
Claim 4
Dependent Claim 18 words
A method according to claim 1, wherein the heat treatment is performed at 350° C. for 5 minutes.
Claim 5
Dependent Claim 39 words
A method according to claim 1, wherein the heat treatment step performed after the first reflow SiO 2 film forming step and the second reflow SiO 2 film forming step subsequent thereto are respectively performed a plurality of times.

References Cited (Backward Citations)

US5314724A Cited
US5387546A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-12-22 2001-06-23 2001-12-23 $2000.00 Window Closed / Lapsed
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11.5 Years (Year 12) 2008-12-22 2009-06-23 2009-12-23 $7700.00 Window Closed / Lapsed

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