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Device having an electrically erasable non-volatile memory and process for producing such a device

Assignee: Commissariat à l'Énergie Atomique et Aux Énergies Alternatives
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Filing: 1995-11-06
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Granted: 1997-12-09
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Expires: 2015-11-06
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Abstract

Abstract Device having an electrically erasable, non-volatile memory and its production process. In a storage area the device has at least one memory cell (12) of the floating grid type with a source (16) and a drain (18) separated by a channel region (14). According to the invention, the device also comprises means (44,38) for applying a memory cell erasing voltage to the channel region (14), independently of the memory cells of adjacent areas, as a result of a complete electrical isolation or insulation of each area. Application to the production of non-volatile memories which can be carried in satellites for replacing EPROM memories.

Inventors

  • 👤 Joel Hartmann

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 08:45
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10B; H10B69/00; H10D30/684; H10D30/685

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 109 words
Device having an electrically erasable, non-volatile memory, comprising in at least one part of a substrate, called the storage area, at least one memory cell of the floating grid type having a source and a drain separated by a channel region, characterized in that the device comprises a single means for polarization of the substrate by applying a first memory cell erasing voltage to the channel region in an erasing mode and applying a second voltage to the channel in reading and writing modes and further characterized in that the substrate is formed by the upper layer of a SOI (silicon-on-insulator) structure and is of a single conductivity type.
Claim 2
Dependent Claim 109 words
Device having an electrically erasable, non-volatile memory, comprising in at least one part of a substrate, called the storage area, at least one memory cell of the floating grid type having a source and a drain separated by a channel region, characterized in that the device comprises a single means for polarization of the substrate by applying a first memory cell erasing voltage to the channel region in an erasing mode and applying a second voltage to the channel in reading and writing modes and further characterized in that the substrate is formed by the upper layer of a SOI (silicon-on-insulator) structure and is of a single conductivity type.
Claim 3
Dependent Claim 19 words
Memory device according to claim 1, characterized in that the device comprises a plurality of mutually insulated storage areas.
Claim 4
Dependent Claim 50 words
Memory device according to claim 1, characterized in that the application means for an erasing voltage comprise, for each storage area, a connection line connected to the substrate part corresponding to the storage area, in order to apply the erasing voltage in the channel region by means of said substrate.
Claim 5
Dependent Claim 29 words
Memory device according to claim 3, characterized in that the device comprises selection transistors for the connection lines for the application of erasing voltages selectively to each storage area.
Claim 6
Dependent Claim 23 words
Memory device according to claim 2, characterized in that the device comprises isolation trenches etched in the substrate for isolating the storage area.
Claim 7
Dependent Claim 48 words
Memory device according to claim 5, characterized in that the substrate has a silicon-on-insulator (SOI) type structure, the isolation trenches being etched in the silicon and have an adequate depth to reach the insulator, so as to form in the substrate insulated recesses corresponding to the storage areas.

References Cited (Backward Citations)

US4783766A Cited
JPH0425077A Cited
US5243559A Cited
US5313086A Cited
FR2681472A1 Cited
US5374564A Cited
WO1994023444A2 Cited
US5794127A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-12-08 2001-06-09 2001-12-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-12-08 2005-06-09 2005-12-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-12-08 2009-06-09 2009-12-09 $7700.00 Window Closed / Lapsed

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