US5243559A
Expired / Lapsed
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Semiconductor memory device
Assignee: Intellectual Ventures I LLC
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Filing: 1991-12-12
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Granted: 1993-09-07
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Expires: 2011-12-12
Abstract
Abstract A semiconductor memory device including a semiconductor substrate of a first conduction type, a memory cell having a floating gate and a control gate which are formed on a main surface of the semiconductor substrate and stacked with an interlayer insulating film interposed therebetween and having a three-layer structure of an oxide film, a nitride film and another oxide film, a decoder for supplying a voltage to the memory cell, a first well formed on the substrate surface and having a second conduction type different from the first conduction type, and a second well formed in the first well and having the first conduction type, wherein one of the memory cell and the decoder is formed in the second well.
Inventors
- 👤 Ichiro Murai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 20:10
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0408; G11C16/0416; G11C16/06; G11C16/10; G11C16/18; H; H10; H10B; H10B41/00; H10B41/70; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/68; H10D64/681
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
141 words
A semiconductor memory device comprising: a semiconductor substrate of a first conduction type; an erasable memory cell for data storage, said memory cell having a floating gate and a control gate which are stacked with an interlayer insulating film interposed therebetween and having a three-layer structure of an oxide film, a nitride film and an oxide film; a decoder for supplying a voltage to said memory cell; a first well formed in a main surface of said substrate and having a second conduction type different from the first conduction type; and a second well formed in said first well and having the first conduction type, wherein one of said memory cell and said decoder is formed in said second well and the other one of said memory cell and said decoder is formed in the main surface of said semiconductor substrate.
Claim 2
Dependent Claim
141 words
A semiconductor memory device comprising: a semiconductor substrate of a first conduction type; an erasable memory cell for data storage, said memory cell having a floating gate and a control gate which are stacked with an interlayer insulating film interposed therebetween and having a three-layer structure of an oxide film, a nitride film and an oxide film; a decoder for supplying a voltage to said memory cell; a first well formed in a main surface of said substrate and having a second conduction type different from the first conduction type; and a second well formed in said first well and having the first conduction type, wherein one of said memory cell and said decoder is formed in said second well and the other one of said memory cell and said decoder is formed in the main surface of said semiconductor substrate.
Claim 3
Dependent Claim
25 words
A semiconductor memory according to claim 1, wherein said memory cell is an N-channel MOS type EPROM, and said decoder is an N-channel MOS transistor.
Claim 4
Dependent Claim
31 words
A semiconductor memory device according to claim 1, wherein said semiconductor substrate is a P-type substrate, said first well is an N-type well and said second well is a P-type well.
Claim 5
Dependent Claim
28 words
A semiconductor memory device according to claim 1, further comprising means for applying voltages to said substrate, said first well and said second well independently of each other.
Claim 6
Dependent Claim
18 words
A semiconductor memory device according to claim 1, wherein said memory cell is formed in said second well.
Claim 7
Dependent Claim
17 words
A semiconductor memory device according to claim 1, wherein said decoder is formed in said second well.
Claim 8
Dependent Claim
32 words
A semiconductor memory device according to claim 2, wherein said MOS transistor of said decorder includes a drain which is connected through a conductor to the control gate of said memory cell
Claim 9
Dependent Claim
18 words
A semiconductor memory device according to claim 1, wherein said decorder is disposed adjacent to said memory cell.
Claim 10
Dependent Claim
111 words
A semiconductor memory device comprising: semiconductor substrate of a first conduction type; a first well formed on a surface of said semiconductor substrate and having a second conduction type different from said first conduction type; a second well formed in said first well and having the first conduction type; an erasable memory cell formed on a surface of said second well for data storage and having a floating gate and a control gate for writing data therein, said floating gate and said control gate being stacked with an interlayer insulating film interposed therebetween; and a decorder formed on a surface of said substrate for applying a voltage to said memory cell.
Claim 11
Dependent Claim
111 words
A semiconductor memory device comprising: semiconductor substrate of a first conduction type; a first well formed on a surface of said semiconductor substrate and having a second conduction type different from said first conduction type; a second well formed in said first well and having the first conduction type; an erasable memory cell formed on a surface of said second well for data storage and having a floating gate and a control gate for writing data therein, said floating gate and said control gate being stacked with an interlayer insulating film interposed therebetween; and a decorder formed on a surface of said substrate for applying a voltage to said memory cell.
Claim 12
Dependent Claim
26 words
A semiconductor memory device according to claim 9, wherein said memory cell is an N-channel MOS type EPROM and said decorder is an N-channel MOS transistor.
Claim 13
Dependent Claim
31 words
A semiconductor memory device according to claim 9, wherein said semiconductor substrate has a P-type conductivity, said first well has an N-type conductivity and said second well has a P-type conductivity.
Claim 14
Dependent Claim
28 words
A semiconductor memory device according to claim 9, further comprising means for applying voltages to said substrate, said first well and said second well independently of each other.
Claim 15
Dependent Claim
18 words
A semiconductor memory device according to claim 9, wherein said memory cell is formed in said second well.
Claim 16
Dependent Claim
32 words
A semiconductor memory device according to claim 10, wherein said MOS transistor of said decorder includes a drain which is connected through a conductor to the control gate of said memory cell.
Claim 17
Dependent Claim
18 words
A semiconductor memory device according to claim 9, wherein said decorder is disposed adjacent to said memory cell.
Claim 18
Dependent Claim
113 words
A semiconductor memory device comprising: a semiconductor substrate of a first conduction type; an erasable memory cell formed on a surface of said semiconductor substrate and having a floating gate and a control gate for writing data therein, said floating gate and said control gate being stacked with an interlayer insulating film interposed therebetween; a first well formed on the surface of said semiconductor substrate adjacent to said erasable memory cell and having a second conduction type different from said first conduction type; a second well formed in said first well and having the first conduction type; and a decorder formed in said second well for applying a voltage to said memory cell.
Claim 19
Dependent Claim
113 words
A semiconductor memory device comprising: a semiconductor substrate of a first conduction type; an erasable memory cell formed on a surface of said semiconductor substrate and having a floating gate and a control gate for writing data therein, said floating gate and said control gate being stacked with an interlayer insulating film interposed therebetween; a first well formed on the surface of said semiconductor substrate adjacent to said erasable memory cell and having a second conduction type different from said first conduction type; a second well formed in said first well and having the first conduction type; and a decorder formed in said second well for applying a voltage to said memory cell.
Claim 20
Dependent Claim
26 words
A semiconductor memory device according to claim 16, wherein said memory cell is an N-channel MOS type EPROM and said decorder is an N-channel MOS transistor.
Claim 21
Dependent Claim
31 words
A semiconductor memory device according to claim 16, wherein said semiconductor substrate has a P-type conductivity, said first well has an N-type conductivity and said second well has a P-type conductivity.
Claim 22
Dependent Claim
27 words
A.semiconductor memory device according to claim 16, further comprising means for applying voltages to said substrate, said first well and said second well independently of each other.
Claim 23
Dependent Claim
32 words
A semiconductor memory device according to claim 17, wherein said MOS transistor of said decorder includes a drain which is connected through a conductor to the control gate of said memory cell.
Claim 24
Dependent Claim
18 words
A semiconductor memory device according to claim 16, wherein said decorder is disposed adjacent to said memory cell.
Claim 25
Dependent Claim
27 words
A semiconductor memory device according to claim 9, wherein said interlayer insulating film includes a three-layer structure of an oxide film, a nitride and an oxide film.
Claim 26
Dependent Claim
27 words
A semiconductor memory device according to claim 16, wherein said interlayer insulating film includes a three-layer structure of an oxide film, a nitride and an oxide film.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-09-06 | 1997-03-08 | 1997-09-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-09-06 | 2001-03-08 | 2001-09-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-09-06 | 2005-03-08 | 2005-09-07 | $7700.00 | Window Closed / Lapsed |