Patent US5687003A successfully refreshed from Google Patents.
US5687003A
Expired / Lapsed
US
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Reader with high-resolution mode and high-speed mode
Assignee: Sharp Corp
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Filing: 1995-10-13
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Granted: 1997-11-11
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Expires: 2015-10-13
Abstract
Abstract A reader having a high-resolution mode and a high-speed mode is disclosed. The reader comprises a CCD sensor, a buffer, a first AD convertor, a second AD convertor, a data selector and a control circuit. The input of the buffer is connected to the CCD sensor through a capacitor and a 5 V power source through an analog switch, and an output of the buffer is connected to the first AD convertor for the high-resolution mode and the second AD convertor for the high-speed mode in parallel. The data selector for selecting an output from the first AD convertor or the second AD convertor and sending it out to the control circuit is connected to the outputs of the first AD convertor and the second AD convertor.
Inventors
- 👤 Fumikazu Nagano
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:59
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/40
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
127 words
A reader having a high-resolution mode and a high speed mode, comprising: a CCD sensor for converting a received light into an electrical analog signal; a first AD convertor for converting the output analog signal of said CCD sensor into a digital signal; a second AD convertor for converting said output analog signal, the bit number of the output digital signal from said second AD convertor being less than that from said first digital signal; selecting means for selecting one of the output digital signals of said first and said second AD convertors, the output digital signal from said first AD convertor corresponding to said high-resolution mode and the output digital signal from said second AD convertor corresponding to said high-speed period corresponds to said high-speed mode.
Claim 2
Dependent Claim
127 words
A reader having a high-resolution mode and a high speed mode, comprising: a CCD sensor for converting a received light into an electrical analog signal; a first AD convertor for converting the output analog signal of said CCD sensor into a digital signal; a second AD convertor for converting said output analog signal, the bit number of the output digital signal from said second AD convertor being less than that from said first digital signal; selecting means for selecting one of the output digital signals of said first and said second AD convertors, the output digital signal from said first AD convertor corresponding to said high-resolution mode and the output digital signal from said second AD convertor corresponding to said high-speed period corresponds to said high-speed mode.
Claim 3
Dependent Claim
28 words
The reader according to claim 1, wherein said first AD convertor performs an analog to digital conversion for a longer period than that of said second AD convertor.
Claim 4
Dependent Claim
90 words
The reader according to claim 1, wherein each of said first and said second AD convertors is arranged to convert an output of the CCD sensor within a predetermined course of time during the respective reading period, and the ratio of said predetermined course of time to the reading period in said second AD convertor is shorter than that of said predetermined course of time to the reading period in said first AD convertor so as to secure a period for stabilizing the output signal level of the CCD sensor.
Claim 5
Dependent Claim
42 words
The reader according to claim 1, further comprises a buffer and an analog switch for clamping the output of said CCD sensor to a predetermined DC voltage supplied from a power source in accordance with a control signal from said control means.
Claim 6
Dependent Claim
39 words
The reader according to claim 1, wherein said control means includes an oscillator for generating a base clock signal and a clock generating circuit for generating a plurality of clock signals by dividing the base clock signal in frequency.
Claim 7
Dependent Claim
38 words
The reader according to claim 1, wherein said first AD convertor converts an analog signal into a digital signal of 12 bits, and said second AD convertor converts an analog signal into a digital signal of 8 bits.
References Cited (Backward Citations)
US4733217A
Cited
US5053771A
Cited
JPH0548460A
Cited
US5264945A
Cited
EP0613289A1
Cited
JPH06253091A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-11-10 | 2001-05-12 | 2001-11-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-11-10 | 2005-05-12 | 2005-11-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-11-10 | 2009-05-12 | 2009-11-11 | $7700.00 | Window Closed / Lapsed |