← Back to Patent Explorer
US5683594A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for making diaphragm-based sensors and apparatus constructed therewith

Assignee: Honeywell Inc
•
Filing: 1994-03-24
•
Granted: 1997-11-04
•
Expires: 2014-03-24
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract This patent relates to the fabrication of diaphragm-based microstructures used primarily for sensing physical phenomena by detecting a change in deflection, resonance, or curvature of the diaphragm. The methods of fabrication described and claimed herein relate primarily to diaphragm-based diaphragms made of silicon, either single crystal or polycrystalline in form, although other materials may be used.

Inventors

  • 👤 G. Benjamin Hocker
  • 👤 David W. Burns
  • 👤 Akintunde I. Akinwande
  • 👤 Robert D. Horning
  • 👤 Amir R. Mirza
  • 👤 Thomas G. Stratton
  • 👤 Deidrich J. Saathoff
  • 👤 James K. Carney
  • 👤 Scott A. McPherson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 02:27
CPC Classifications
B; B81; B81C; B81C1/00; B81C1/00015; B81C1/00134; B81C1/00182; G; G01; G01L; G01L9/00; G01L9/0041; G01L9/0042; G01L9/0072; G01L9/0073; H; H10; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1914; B81B; B81B2201/00; B81B2201/02; B81B2201/0292; B81B2203/00; B81B2203/01; B81B2203/0127

Claims Analysis

Total Claims: 44
Claim 1
Independent Claim 87 words
A method for producing diaphragm-containing microstructures comprising the steps of: a. creating a cavity in a 1st surface of a 1st semiconductor wafer, b. substantially backfilling the cavity with a solid material that is removable without damage to the wafer through an etching process, c. bonding a 1st surface of a 2nd semiconductor wafer to the 1st surface of the 1st wafer, d. creating an access passage through 1st wafer to the cavity, and e. removing the solid material through the access passage by the etching process.
Claim 2
Independent Claim 87 words
A method for producing diaphragm-containing microstructures comprising the steps of: a. creating a cavity in a 1st surface of a 1st semiconductor wafer, b. substantially backfilling the cavity with a solid material that is removable without damage to the wafer through an etching process, c. bonding a 1st surface of a 2nd semiconductor wafer to the 1st surface of the 1st wafer, d. creating an access passage through 1st wafer to the cavity, and e. removing the solid material through the access passage by the etching process.
Claim 3
Dependent Claim 29 words
A method as set forth in claim 1 wherein said 2nd wafer is reduced in thickness subsequent to step c., thereby forming a deformable diaphragm region over said cavity.
Claim 4
Dependent Claim 64 words
A method as set forth in claim 2 wherein said 2nd wafer contains an epitaxial layer grown on the whole of the 1st surface of the 2nd wafer, the 1st surface of the 2nd wafer having said epitaxial layer is then bonded to the 1st surface of the 1st wafer, and the 2nd wafer is removed, after step c., except for said epitaxial layer.
Claim 5
Dependent Claim 14 words
A method as set forth in claim 1 wherein said semiconductor wafers are silicon.
Claim 6
Dependent Claim 15 words
The method as set forth in claim 4 wherein said solid material is silicon dioxide.
Claim 7
Dependent Claim 37 words
The method as set forth in claim 4 wherein said step of backfilling the cavity with the solid material is performed by deposition of silicon dioxide into said cavity at a temperature substantially below 600 degrees Centigrade.
Claim 8
Dependent Claim 73 words
The method as set forth in claim 6 wherein after the step wherein said solid material is deposited in said cavity, said solid material has a surface portion extending initially higher than the 1st surface of 1st wafer, comprising the additional step of: removing said surface portion until said surface portion is reduced to substantially exactly the same height or lower but no higher than the first surface of the 1st semiconductor wafer.
Claim 9
Dependent Claim 57 words
The method as set forth in claim 1 wherein said solid material is deposited over the entire 1st surface of the 1st wafer and subsequently removed so as to remain only in said cavity at a level that is substantially the same height or lower but no higher than the 1st surface of the 1st semiconductor wafer.
Claim 10
Dependent Claim 26 words
The method as set forth in claim 5 wherein said backfilling step is performed by thermal oxidation of said first surface of said 1st semiconductor wafer.
Claim 11
Dependent Claim 62 words
The method as set forth in claim 9 wherein said silicon dioxide is formed over the entire 1st surface of said 1st wafer and subsequently removed so as to remain only in said cavity where the exterior surface of said solid material is substantially exactly the same height or lower but no higher than the first surface of the 1st semiconductor wafer.
Claim 12
Dependent Claim 84 words
A process for removing a projecting oxidation ridge formation caused by the upgrowth of oxide when oxidizing a surface of a semiconductor wafer, said ridge formation occurring at the periphery of a cavity in said surface, said process further comprising the step of: patterning to expose a portion of a surface of said wafer surface including off of at least one oxidation ridge formation etching said exposed portion of the surface of said wafer until said at least one oxidation ridge formation is removed.
Claim 13
Dependent Claim 84 words
A process for removing a projecting oxidation ridge formation caused by the upgrowth of oxide when oxidizing a surface of a semiconductor wafer, said ridge formation occurring at the periphery of a cavity in said surface, said process further comprising the step of: patterning to expose a portion of a surface of said wafer surface including off of at least one oxidation ridge formation etching said exposed portion of the surface of said wafer until said at least one oxidation ridge formation is removed.
Claim 14
Dependent Claim 55 words
The method as set forth in claim 9 further comprising the additional step of: patterning to expose a portion of a surface of said wafer surface including off of at least one oxidation ridge formation etching said exposed portion of the surface of said wafer until said at least one oxidation ridge formation is removed.
Claim 15
Independent Claim 94 words
A method for producing diaphragm-containing microstructures comprising the steps of: a. creating a cavity in a 1st surface of a 1st silicon wafer, b. bonding a 1st surface of a 2nd silicon wafer to the 1st surface of the 1st wafer, c. creating an access passage through said 1st wafer to said cavity, d. growing silicon dioxide to substantially fill the cavity, e. reducing the 2nd wafer in thickness to form a deformable diaphragm region over the cavity, and f. removing the silicon dioxide from the cavity through the access passage by etching means.
Claim 16
Independent Claim 94 words
A method for producing diaphragm-containing microstructures comprising the steps of: a. creating a cavity in a 1st surface of a 1st silicon wafer, b. bonding a 1st surface of a 2nd silicon wafer to the 1st surface of the 1st wafer, c. creating an access passage through said 1st wafer to said cavity, d. growing silicon dioxide to substantially fill the cavity, e. reducing the 2nd wafer in thickness to form a deformable diaphragm region over the cavity, and f. removing the silicon dioxide from the cavity through the access passage by etching means.
Claim 17
Independent Claim 208 words
A method for producing diaphragm-containing microstructures comprising the steps of: a. creating a 1st cavity in a 1st surface of a 1st semiconductor wafer, then, b. substantially backfilling the cavity with material which is removable without damage to the wafer through an etching process, then, c. bonding a 1st surface of a 2nd semiconductor wafer to the 1st surface of the 1st wafer, then, d. reducing the 2nd wafer in thickness, thereby forming a deformable diaphragm region over the cavity and exposing a 2nd surface of the 2nd wafer, and, prior to step i, e. creating an access passage through the 1st wafer to the cavity, f. forming in the 2nd surface of the 2nd wafer at least one electrical sensor element disposed above the cavity, and forming at least one electrical conducting element electrically coupled to said electrical sensor element, g. creating a 2nd cavity in a 1st surface of a 3rd wafer, h. bonding the 1st surface of the 3rd wafer to the 2nd surface of the 2nd wafer such that the 1st and 2nd cavities are aligned substantially opposite to each other on 1st and 2nd sides of the deformable diaphragm region, respectively, and i. removing the material through the access passage by etching means.
Claim 18
Independent Claim 208 words
A method for producing diaphragm-containing microstructures comprising the steps of: a. creating a 1st cavity in a 1st surface of a 1st semiconductor wafer, then, b. substantially backfilling the cavity with material which is removable without damage to the wafer through an etching process, then, c. bonding a 1st surface of a 2nd semiconductor wafer to the 1st surface of the 1st wafer, then, d. reducing the 2nd wafer in thickness, thereby forming a deformable diaphragm region over the cavity and exposing a 2nd surface of the 2nd wafer, and, prior to step i, e. creating an access passage through the 1st wafer to the cavity, f. forming in the 2nd surface of the 2nd wafer at least one electrical sensor element disposed above the cavity, and forming at least one electrical conducting element electrically coupled to said electrical sensor element, g. creating a 2nd cavity in a 1st surface of a 3rd wafer, h. bonding the 1st surface of the 3rd wafer to the 2nd surface of the 2nd wafer such that the 1st and 2nd cavities are aligned substantially opposite to each other on 1st and 2nd sides of the deformable diaphragm region, respectively, and i. removing the material through the access passage by etching means.
Claim 19
Dependent Claim 15 words
The method set forth in claim 14 wherein 1st and 2nd semiconductor wafers are silicon.
Claim 20
Dependent Claim 50 words
The method set forth in claim 14 wherein the process for bonding said 3rd wafer is carried out at a temperature substantially less than 700 degrees Centigrade, which is a so as to not impair said at least one electrical sensor element or said at least one electrical conducting element.
Claim 21
Dependent Claim 13 words
The method set forth in claim 15 wherein said 3rd wafer is silicon.
Claim 22
Dependent Claim 16 words
The method set forth in claim 15 wherein said 3rd wafer is a borosilicate glass wafer.
Claim 23
Independent Claim 83 words
A method for producing diaphragm-containing microstructures comprising the steps of: a. creating a cavity in a 1st surface of a 1st semiconductor wafer, b. substantially backfilling the cavity with material which is removable without damage to the wafer through an etching process, c. bonding a 2nd semiconductor wafer to the 1st surface of the 1st wafer, d. creating an access passage through the 2nd wafer to the cavity, and e. removing the material from the cavity through the access passage by etching means.
Claim 24
Independent Claim 83 words
A method for producing diaphragm-containing microstructures comprising the steps of: a. creating a cavity in a 1st surface of a 1st semiconductor wafer, b. substantially backfilling the cavity with material which is removable without damage to the wafer through an etching process, c. bonding a 2nd semiconductor wafer to the 1st surface of the 1st wafer, d. creating an access passage through the 2nd wafer to the cavity, and e. removing the material from the cavity through the access passage by etching means.
Claim 25
Dependent Claim 29 words
A method as set forth in claim 19 wherein said 1st wafer is reduced in thickness to form a deformable diaphragm region over said cavity subsequent to step c.
Claim 26
Dependent Claim 56 words
A method as set forth in claim 20 wherein said 1st wafer contains an epitaxial layer of thickness greater than the depth of said cavity grown on the whole of the 1st surface, said 2nd wafer is bonded to the 1st surface to 1st wafer, and the 1st wafer is removed except for the epitaxial layer.
Claim 27
Dependent Claim 14 words
A method as set forth in claim 19 wherein said semiconductor wafers are silicon.
Claim 28
Dependent Claim 14 words
A method as set forth in claim 19 wherein said material is silicon dioxide.
Claim 29
Dependent Claim 29 words
A method as set forth in claim 19 wherein said backfilling step is performed by depositing silicon dioxide into said cavity at a temperature substantially below 600 degrees Centigrade.
Claim 30
Dependent Claim 62 words
A method as set forth in claim 19 wherein an exterior surface of said material is initially higher than the 1st surface of said 1st wafer comprising the additional step of: removing all of said exterior surface of said material so that it is substantially exactly the same height or lower but no higher than the said surface of the 1st wafer.
Claim 31
Dependent Claim 57 words
A method as set forth in claim 24 wherein said low temperature silicon dioxide is deposited over the whole 1st surface of the 1st wafer and subsequently removed so as to remain only in said cavity where it is substantially exactly the same height or lower but no higher than the said surface of the 1st wafer.
Claim 32
Dependent Claim 22 words
A method as set forth in claim 19 wherein said backfilling step is performed by thermal oxidation of the 1st silicon wafer.
Claim 33
Dependent Claim 55 words
A method as set forth in claim 27 wherein said silicon dioxide is formed over the entire 1st surface of the 1st wafer and subsequently removed so as to remain only in said cavity where it is substantially exactly the same height or lower but no higher than the said surface of the 1st wafer.
Claim 34
Dependent Claim 97 words
A method as set forth in claim 27 further comprising an additional step of removing all of at least one a projecting oxidation ridge formation caused by the upgrowth of oxide when oxidizing a surface of a semiconductor wafer, said ridge formation occurring at the periphery of a cavity in said surface, said additional step comprising: patterning to expose a portion of a surface of said wafer surface including off of at least one oxidation ridge formation etching said exposed portion of the surface of said wafer until said at least one oxidation ridge formation is removed.
Claim 35
Dependent Claim 46 words
A method as set forth in claim 4 wherein said bonding of 2nd wafer to 1st wafer is accomplished by treating the surfaces of said 1st and 2nd wafers to make them hydrophyllic, contacting said wafers, and annealing them at a temperature of about 600-1200 C.
Claim 36
Dependent Claim 46 words
A method as set forth in claim 15 wherein said bonding of 2nd wafer to 1st wafer is accomplished by treating the surfaces of said 1st and 2nd wafers to make them hydrophyllic, contacting said wafers, and annealing them at a temperature of about 600-1200 C.
Claim 37
Dependent Claim 46 words
A method as set forth in claim 22 wherein said bonding of 2nd wafer to 1st wafer is accomplished by treating the surfaces of said 1st and 2nd wafers to make them hydrophyllic, contacting said wafers, and annealing them at a temperature of about 600-1200 C.
Claim 38
Dependent Claim 21 words
A method as set forth in claim 16 wherein said bonding of 3rd wafer is accomplished by an electrostatic bonding process.
Claim 39
Independent Claim 200 words
A method for producing diaphragm-containing microstructures comprising the steps of: a. creating a 1st cavity in a 1st surface of a 1st semiconductor wafer, b. substantially filling the cavity with a material which is removable without damage to the wafer through etching means, c. bonding a 2nd semiconductor wafer to the 1st surface of the 1st wafer, d. reducing the 1st wafer in thickness to form a deformable diaphragm region over the cavity and exposing a 2nd surface of the 1st wafer, e. creating an access passage through 2nd wafer to the cavity, f. forming in the 2nd surface of the 1st wafer at least one electrical sensor element disposed above the cavity, and forming at least one electrical conducting element associated with said at least one electrical sensor element, g. creating a 2nd cavity in a 1st surface of a 3rd wafer, h. bonding the 1st surface of the 3rd wafer to the 2nd surface of the 1st wafer such that the 1st and 2nd cavities are aligned substantially opposite to each other on 1st and 2nd sides of the deformable diaphragm region, respectively, and i. removing the material from the cavity through the access passage by etching means.
Claim 40
Independent Claim 200 words
A method for producing diaphragm-containing microstructures comprising the steps of: a. creating a 1st cavity in a 1st surface of a 1st semiconductor wafer, b. substantially filling the cavity with a material which is removable without damage to the wafer through etching means, c. bonding a 2nd semiconductor wafer to the 1st surface of the 1st wafer, d. reducing the 1st wafer in thickness to form a deformable diaphragm region over the cavity and exposing a 2nd surface of the 1st wafer, e. creating an access passage through 2nd wafer to the cavity, f. forming in the 2nd surface of the 1st wafer at least one electrical sensor element disposed above the cavity, and forming at least one electrical conducting element associated with said at least one electrical sensor element, g. creating a 2nd cavity in a 1st surface of a 3rd wafer, h. bonding the 1st surface of the 3rd wafer to the 2nd surface of the 1st wafer such that the 1st and 2nd cavities are aligned substantially opposite to each other on 1st and 2nd sides of the deformable diaphragm region, respectively, and i. removing the material from the cavity through the access passage by etching means.
Claim 41
Dependent Claim 13 words
A method set forth in claim 34 wherein said semiconductor wafers are silicon.
Claim 42
Dependent Claim 46 words
A method set forth in claim 33 wherein the process for bonding said 3rd wafer is carried out at a temperature substantially less than 700 degrees Centigrade so as not to impair said at least one electrical sensor element or at least one electrical conducting element.
Claim 43
Dependent Claim 13 words
A method set forth in claim 34 wherein said 3rd wafer is silicon.
Claim 44
Dependent Claim 14 words
A method set forth in claim 34 wherein said 3rd wafer is borosilicate glass.

References Cited (Backward Citations)

US4565096A Cited
US5004705A Cited
US5344523A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-11-03 2001-05-05 2001-11-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-11-03 2005-05-05 2005-11-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-11-03 2009-05-05 2009-11-04 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag