Patent US5675241A successfully refreshed from Google Patents.
US5675241A
Expired / Lapsed
US
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Voltage regulator with low drop out voltage
Assignee: Texas Instruments Inc
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Filing: 1996-06-27
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Granted: 1997-10-07
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Expires: 2016-06-27
Abstract
Abstract A circuit and method for providing a low drop out voltage regulator. A source follower circuit is provided having a transistor (MD1) with an output terminal for driving a load at its source terminal and a voltage supply coupled to the drain terminal. At least one diode (D1) is coupled between the gate terminal and a ground reference to provide a predetermined voltage at the gate of the transistor (MD1). A voltage multiplier circuit is provided having an input (IN) for receiving an oscillating input voltage and a charge storage device (39) coupled between the oscillating input and a voltage reference (Vref), and being further coupled in series with the voltage reference and then to the gate terminal of the transistor (MD1). The oscillating input voltage is used to charge the charge storage device (39) to a voltage approximately equal to the voltage reference. When the supply voltage falls below the normal level, the series combination of the voltage reference and the charge storage device provides a multiplied voltage at the gate of the transistor, for example a voltage of twice the reference voltage. This high gate voltage keeps the output at the source of the transistor at a high voltage that is approximately equal to the supply voltage, such that the circuit provides a low drop out voltage under low supply voltage conditions.
Inventors
- 👤 Ross E. Teggatz
- 👤 Joseph A. Devore
- 👤 Jonathan R. Knight
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 14:57
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; G05F3/242; G05F3/247
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
176 words
A low drop out voltage regulator circuit, comprising: an input for receiving an oscillating input voltage; a reference voltage terminal for receiving a reference voltage; a transistor having a drain terminal coupled to a supply voltage terminal, a source terminal coupled to an output and having a gate terminal, said transistor providing a predetermined regulated output voltage at said source terminal; at least one diode coupled between the gate terminal of said transistor and a ground reference terminal, said diode operable for providing a predetermined voltage at said gate terminal; and a charge storage device coupled to said oscillating input voltage input and to said reference voltage terminal, said charge storage device being charged to said reference voltage and having an output coupled to said gate terminal of said transistor; wherein said charge storage device provides a predetermined voltage at said transistor gate terminal, such that when said supply voltage falls below the specified voltage for said supply voltage the regulated voltage at the transistor source terminal transistor remains high and substantially equals said supply voltage.
Claim 2
Dependent Claim
176 words
A low drop out voltage regulator circuit, comprising: an input for receiving an oscillating input voltage; a reference voltage terminal for receiving a reference voltage; a transistor having a drain terminal coupled to a supply voltage terminal, a source terminal coupled to an output and having a gate terminal, said transistor providing a predetermined regulated output voltage at said source terminal; at least one diode coupled between the gate terminal of said transistor and a ground reference terminal, said diode operable for providing a predetermined voltage at said gate terminal; and a charge storage device coupled to said oscillating input voltage input and to said reference voltage terminal, said charge storage device being charged to said reference voltage and having an output coupled to said gate terminal of said transistor; wherein said charge storage device provides a predetermined voltage at said transistor gate terminal, such that when said supply voltage falls below the specified voltage for said supply voltage the regulated voltage at the transistor source terminal transistor remains high and substantially equals said supply voltage.
Claim 3
Dependent Claim
77 words
The circuit of claim 1, wherein said charge storage device comprises: a capacitor coupled between said oscillating input and said reference voltage terminal; a first diode coupled between said reference voltage and the output of said capacitor to prevent charge from flowing towards said reference voltage terminal; and a second diode coupled between the output of said capacitor and the gate terminal of said transistor to prevent the transistor gate terminal from discharging current towards said capacitor.
Claim 4
Dependent Claim
19 words
The circuit of Claim 1, and further comprising an inverter coupled between said input and said charge storage device.
Claim 5
Dependent Claim
30 words
The circuit of claim 1, wherein the source terminal of said transistor is further coupled to said reference voltage terminal, such that the regulated output voltage provides the reference voltage.
Claim 6
Dependent Claim
27 words
The circuit of claim 1, and further comprising a current source circuit coupled to said voltage supply and providing a predetermined current into said serially coupled diodes.
Claim 7
Dependent Claim
30 words
The circuit of claim 1, wherein said charge storage device provides a voltage at said transistor gate terminal that is a multiple of the voltage at said reference voltage terminal.
Claim 8
Dependent Claim
28 words
The circuit of claim 6, wherein said charge storage device provides a voltage at said transistor gate terminal that is twice the voltage at said reference voltage terminal.
Claim 9
Dependent Claim
79 words
The circuit of claim 1, wherein said charge storage device comprises: a capacitor coupled between said oscillating input and said reference voltage terminal; a first diode coupled between said reference voltage and the output of said capacitor to prevent charge from flowing towards said reference voltage terminal; and a second diode coupled between the output of said capacitor and the transistor gate terminal to prevent current at the gate terminal of said transistor from being discharged into said capacitor.
Claim 10
Independent Claim
192 words
A method of providing a low drop out regulator circuit, comprising the steps of: receiving an oscillating input voltage into an input terminal; receiving a reference voltage; providing a transistor having a drain terminal coupled to a supply voltage terminal, coupling the transistor source terminal to an output terminal and coupling the transistor gate terminal to a current source, said transistor providing a predetermined regulated voltage at said output terminal; coupling at least one diode between the gate terminal of said transistor and a Found reference terminal, for providing a predetermined voltage at said gate terminal; coupling a charge storage device between said input terminal and said reference voltage terminal, said charge storage device being charged to said reference voltage and having an output coupled to said gate terminal of said transistor; and charging said charge storage device with said oscillating input voltage to a voltage equal to said reference voltage, and providing said voltage to said gate terminal such that when said supply voltage falls below the specified level for said supply voltage, the regulated voltage at the source terminal of said transistor remains high and substantially equals said supply voltage.
Claim 11
Independent Claim
192 words
A method of providing a low drop out regulator circuit, comprising the steps of: receiving an oscillating input voltage into an input terminal; receiving a reference voltage; providing a transistor having a drain terminal coupled to a supply voltage terminal, coupling the transistor source terminal to an output terminal and coupling the transistor gate terminal to a current source, said transistor providing a predetermined regulated voltage at said output terminal; coupling at least one diode between the gate terminal of said transistor and a Found reference terminal, for providing a predetermined voltage at said gate terminal; coupling a charge storage device between said input terminal and said reference voltage terminal, said charge storage device being charged to said reference voltage and having an output coupled to said gate terminal of said transistor; and charging said charge storage device with said oscillating input voltage to a voltage equal to said reference voltage, and providing said voltage to said gate terminal such that when said supply voltage falls below the specified level for said supply voltage, the regulated voltage at the source terminal of said transistor remains high and substantially equals said supply voltage.
Claim 12
Dependent Claim
86 words
The method of claim 8, wherein said step of providing a charge storage device comprises the steps of: coupling a capacitance between said oscillating input and said reference voltage terminal; coupling a first diode between said reference voltage and the output of said capacitance to prevent charge from flowing towards said reference voltage terminal; and coupling a second diode between the output of said capacitor and the gate terminal of said transistor, to prevent the gate terminal of said transistor from discharging current towards said capacitor.
Claim 13
Dependent Claim
27 words
The method of claim 8, and further comprising the step of coupling an inverter between said input terminal for an oscillating signal and said charge storage device.
Claim 14
Dependent Claim
33 words
The method of claim 8, and further comprising the step of coupling the output terminal of said transistor to said reference voltage terminal, such that the regulated output voltage provides the reference voltage.
Claim 15
Dependent Claim
31 words
The method of claim 8, and further comprising the step of coupling a current source circuit to said voltage supply for providing a predetermined current into said at least one diode.
Claim 16
Dependent Claim
37 words
The method of claim 8, wherein the stop of charging said charge storage device and providing a voltage at said gate terminal of said transistor comprises providing a voltage that is a multiple of the reference voltage.
Claim 17
Dependent Claim
30 words
The method of claim 13, wherein said stop of providing a voltage that is a multiple of the reference voltage comprises providing a voltage that is twice the reference voltage.
Claim 18
Dependent Claim
84 words
The method of claim 13, wherein said stop of providing a charge storage device further comprises: coupling a capacitance between said oscillating input and said reference voltage terminal; coupling a first diode between said reference voltage and the output of said capacitance to prevent charge from flowing towards said reference voltage terminal; and coupling a second diode between the output of said capacitance and the gate terminal of said transistor to prevent the, gate terminal of said transistor from discharging current towards said capacitance.
References Cited (Backward Citations)
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2000-10-06 | 2001-04-07 | 2001-10-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-10-06 | 2005-04-07 | 2005-10-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-10-06 | 2009-04-07 | 2009-10-07 | $7700.00 | Window Closed / Lapsed |