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US5673423A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and apparatus for aligning the operation of a plurality of processors

Assignee: TM Patents LP
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Filing: 1994-11-23
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Granted: 1997-09-30
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Expires: 2014-11-23
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Abstract

Abstract A method and apparatus are disclosed for aligning a plurality of multi-processors. The apparatus preferably comprises an alignment unit associated with each processor and a logic network for combining the output of the alignment unit and for broadcasting information to these units. Alignment is achieved by inserting in the instruction stream from each processor that is to be aligned a request for alignment, by testing for prior completion of any instructions that must be completed and by causing all processors to wait until they have all made the request for alignment and completed necessary prior instructions. The alignment unit associated with each processor monitors the instruction stream to detect a request for alignment. The logic network illustratively is an array of AND gates that tests each alignment unit to determine if it has detected a request for alignment. When all the units have made such a request, the logic network informs the alignment units; and the alignment units inform the processors.

Inventors

  • 👤 W. Daniel Hillis

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 22:05
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/52

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 264 words
A method of controlling a computer system comprising a plurality of processors, each processor processing a separate instruction stream, each instruction stream comprising instructions of a plurality of instruction types including an alignment request type, an alignment test type, and at least one other instruction type, and each instruction stream including at least one instruction of the alignment request type situated in the instruction stream to be executed at one point in time, at least one instruction of the alignment test type situated in the instruction stream to be executed at a later point in time than the instruction of the alignment request type, and at least some instruction streams having an instruction of another instruction type situated for execution at a point in time between execution of the instruction of the alignment request type and the instruction of the alignment test type, the method to bring said processors into alignment comprising the steps of: A. each of said processors upon execution of an instruction from its respective instruction stream of said alignment request type generating a request indication and thereafter continuing execution of instructions, from its respective instruction stream, B. each of said processors, upon execution of an instruction from its respective instruction stream of said alignment test type, being disabled from processing subsequent instructions in its instruction stream in the absence of an alignment indication; and C. generating said alignment indication when all of said processors have generated said request indication, thereby to enable said processors to execute instructions from their respective instruction streams following the instruction of said alignment test type.
Claim 2
Independent Claim 264 words
A method of controlling a computer system comprising a plurality of processors, each processor processing a separate instruction stream, each instruction stream comprising instructions of a plurality of instruction types including an alignment request type, an alignment test type, and at least one other instruction type, and each instruction stream including at least one instruction of the alignment request type situated in the instruction stream to be executed at one point in time, at least one instruction of the alignment test type situated in the instruction stream to be executed at a later point in time than the instruction of the alignment request type, and at least some instruction streams having an instruction of another instruction type situated for execution at a point in time between execution of the instruction of the alignment request type and the instruction of the alignment test type, the method to bring said processors into alignment comprising the steps of: A. each of said processors upon execution of an instruction from its respective instruction stream of said alignment request type generating a request indication and thereafter continuing execution of instructions, from its respective instruction stream, B. each of said processors, upon execution of an instruction from its respective instruction stream of said alignment test type, being disabled from processing subsequent instructions in its instruction stream in the absence of an alignment indication; and C. generating said alignment indication when all of said processors have generated said request indication, thereby to enable said processors to execute instructions from their respective instruction streams following the instruction of said alignment test type.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-09-29 2001-03-31 2001-09-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-09-29 2005-03-31 2005-09-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-09-29 2009-03-31 2009-09-30 $7700.00 Window Closed / Lapsed

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