US5672912A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Resin-sealed type semiconductor device and method for manufacturing the same
Assignee: Sharp Corp
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Filing: 1996-07-19
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Granted: 1997-09-30
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Expires: 2016-07-19
Abstract
Abstract A resin-sealed type semiconductor device comprising a semiconductor chip having an electrode pad, a wiring component composed of a wiring layer formed on one side of an insulating board, a through-hole penetrating through the insulating board and a projecting electrode formed on the other side of the insulating board and at the position corresponding to the through-hole, wherein the semiconductor chip and the wiring component are disposed so that the electrode pad and the projecting electrode are welded together, and at least the gap between the semiconductor chip and the wiring component is sealed with a resin.
Inventors
- 👤 Kazumasa Aoki
- 👤 Yoshiki Sota
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 09:16
CPC Classifications
H; H10; H10W; H10W42/00; H10W42/121; H10W70/00; H10W70/60; H10W70/62; H10W70/63; H10W70/635; H10W72/00; H10W72/30; H10W74/00; H10W74/01; H10W74/012; H10W74/10; H10W74/15; H10W90/00; H10W90/701; H10W70/65; H10W70/654; H10W70/656; H10W72/071; H10W72/073; H10W72/851; H10W72/853; H10W72/856; H10W90/721; H10W90/724; H10W90/731; H10W90/734
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
122 words
A resin-sealed type semiconductor device comprising: a semiconductor chip having an electrode pad; a wiring component composed of a wiring layer formed on one side of an insulating board, a through-hole penetrating through the insulating board and a projecting electrode formed on the other side of the insulating board and at the position corresponding to the through-hole; said semiconductor chip and said wiring component being disposed so that the electrode pad and the projecting electrode are welded together, and at least the gap between the semiconductor chip and the wiring component is sealed with a resin, the insulating board having a surface along one side thereof and a groove in said surface only partially penetrating between opposite sides of said insulating board.
Claim 2
Dependent Claim
122 words
A resin-sealed type semiconductor device comprising: a semiconductor chip having an electrode pad; a wiring component composed of a wiring layer formed on one side of an insulating board, a through-hole penetrating through the insulating board and a projecting electrode formed on the other side of the insulating board and at the position corresponding to the through-hole; said semiconductor chip and said wiring component being disposed so that the electrode pad and the projecting electrode are welded together, and at least the gap between the semiconductor chip and the wiring component is sealed with a resin, the insulating board having a surface along one side thereof and a groove in said surface only partially penetrating between opposite sides of said insulating board.
Claim 3
Dependent Claim
41 words
A resin-sealed type semiconductor device according to claim 1, in which the semiconductor chip has at least two equally-spaced electrode pads, and the wiring component has at least two projecting electrodes disposed with the almost same spacing as the electrode pads.
Claim 4
Dependent Claim
40 words
A resin-sealed type semiconductor device according to claim 1, in which a metal foil is disposed between the semiconductor chip and the wiring component, and the metal foil is connected to the grounding terminal of the resin-sealed type semiconductor device.
Claim 5
Independent Claim
176 words
A method for manufacturing a resin-sealed type semiconductor device, the method comprising the steps of: forming a wiring layer on one side of an insulating board; forming a through-hole penetrating through the insulating board; the through-hole opening on the other side of the insulating board at a position corresponding to the location of an electrode pad of a semiconductor chip to be welded; forming a wiring component by forming a projecting electrode on the wiring layer and through the through-hole, said wiring component and said semiconductor chip having different coefficients of thermal expansion; sealing at least the gap between the semiconductor chip and the wiring component with a resin; welding the electrode pad and the projecting electrode together by heating the wiring layer; and forming a groove in a surface of said insulating board to compensate for differential contraction of the semiconductor chip and insulating board, subsequent to welding and without complete penetration between opposite sides of said insulating board, thereby alleviating shear stress generated at the weld between the electrode pad and the projecting electrode.
Claim 6
Independent Claim
176 words
A method for manufacturing a resin-sealed type semiconductor device, the method comprising the steps of: forming a wiring layer on one side of an insulating board; forming a through-hole penetrating through the insulating board; the through-hole opening on the other side of the insulating board at a position corresponding to the location of an electrode pad of a semiconductor chip to be welded; forming a wiring component by forming a projecting electrode on the wiring layer and through the through-hole, said wiring component and said semiconductor chip having different coefficients of thermal expansion; sealing at least the gap between the semiconductor chip and the wiring component with a resin; welding the electrode pad and the projecting electrode together by heating the wiring layer; and forming a groove in a surface of said insulating board to compensate for differential contraction of the semiconductor chip and insulating board, subsequent to welding and without complete penetration between opposite sides of said insulating board, thereby alleviating shear stress generated at the weld between the electrode pad and the projecting electrode.
Claim 7
Dependent Claim
78 words
A method according to claim 4 wherein the wiring component and the semiconductor chip have different coefficients of thermal expansion, and including the steps of determining, prior to welding, a location discrepancy between the semiconductor chip and the wiring component due to the difference in thermal expansion thereof at ambient and welding temperatures and using the determined location discrepancy to match the positions of the projecting electrode and the semiconductor chip electrode pad substantially at the welding temperature.
Claim 8
Dependent Claim
32 words
A method according to claim 4 including the step of, subsequent to welding, applying a dielectric layer to exposed portions of said wiring layer on said one side of said insulating board.
Claim 9
Dependent Claim
46 words
A method according to claim 4 wherein during welding the wiring layer is exposed along said one side of said insulating board, and subsequent to welding, applying a dielectric layer to said exposed portions of said wiring layer on said one side of said insulating board.
Claim 10
Dependent Claim
63 words
A method according to claim 4 including the steps of determining, prior to welding, a location discrepancy between the semiconductor chip and the wiring component due to the difference in thermal expansion thereof at ambient and welding temperatures and using the determined location discrepancy to match the positions of the projecting electrode and the semiconductor chip electrode pad substantially at the welding temperature.
Claim 11
Dependent Claim
19 words
A method according to claim 4 including disposing a metal foil between the semiconductor chip and the wiring component.
Claim 12
Dependent Claim
26 words
A method according to claim 4 including disposing a metal foil on said wiring component prior to welding the electrode pad and the projecting electrode together.
Claim 13
Dependent Claim
35 words
A method according to claim 4 including disposing a metal foil between the semiconductor chip and the wiring component, said semiconductor chip having a grounding terminal, and connecting the grounding terminal to the semiconductor chip.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-09-29 | 2001-03-31 | 2001-09-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-09-29 | 2005-03-31 | 2005-09-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-09-29 | 2009-03-31 | 2009-09-30 | $7700.00 | Window Closed / Lapsed |