US5668765A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Charge transfer sense amplifier
Assignee: Adelante Technologies BV
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Filing: 1996-06-06
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Granted: 1997-09-16
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Expires: 2016-06-06
Abstract
Abstract An electronic memory has a voltage sense amplifier coupled to a memory cell via a bit line for supply of an output signal under control of data stored in the cell. The sense amplifier is both powered and controlled by redistribution of electric charge, representative of the data and initially accumulated at the bit line, between the bit line and the output of the sense amplifier.
Inventors
- 👤 Michael Anthony Ang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 18:20
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/06; G11C7/065
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
134 words
An electronic circuit with a memory that has: a memory cell for storing data; a bit line selectively connected to the cell; a voltage sense amplifier having an input selectively connected to the bit line for sensing a bit line voltage representative of the data, and an output for providing an output signal representative of the data, wherein: the voltage sense amplifier is powered by the bit line voltage through transfer of electric charge from the bit line to the voltage sense amplifier, the output supplies the output signal created from the charge being redistributed between the bit line and the output of the voltage sense amplifier, and the sense amplifier has means for precharging the output so that the output is electrically connected to the bit line when the sense amplifier starts sensing.
Claim 2
Dependent Claim
134 words
An electronic circuit with a memory that has: a memory cell for storing data; a bit line selectively connected to the cell; a voltage sense amplifier having an input selectively connected to the bit line for sensing a bit line voltage representative of the data, and an output for providing an output signal representative of the data, wherein: the voltage sense amplifier is powered by the bit line voltage through transfer of electric charge from the bit line to the voltage sense amplifier, the output supplies the output signal created from the charge being redistributed between the bit line and the output of the voltage sense amplifier, and the sense amplifier has means for precharging the output so that the output is electrically connected to the bit line when the sense amplifier starts sensing.
Claim 3
Dependent Claim
95 words
The circuit of claim 1 wherein: the memory has a further bit line; the cell is selectively connected to the bit line and to the further bit line; the voltage sense amplifier has a further input selectively connected to the cell via the further bit line; the voltage sense amplifier has a further output for providing a further output signal representative of the data; the voltage sense amplifier comprises a regenerative feedback arrangement connected to the input, the further input, the output and the further output, and operative to drive the transfer of the charge.
Claim 4
Dependent Claim
67 words
The circuit of claim 2, wherein the regenerative feedback arrangement comprises: a first current path between the input and the output; a second current path between the further input and the further output; wherein: a first voltage of the output controls the transfer of charge through the second current path; a second voltage of the further output controls the transfer of charge through the first current path.
Claim 5
Dependent Claim
82 words
The circuit of claim 3, wherein the regenerative feedback arrangement further comprises: a third current path between the output and a reference node; a fourth current path between the further output and the reference node; wherein: the first voltage controls the fourth current path; the second voltage controls the third current path; conductivities of the first and third current paths are oppositely controlled by the second voltage; conductivities of the second and fourth current paths are oppositely controlled by the first voltage.
Claim 6
Dependent Claim
38 words
The circuit of claim 2, wherein the sense amplifier has an equalizing path between the input and the further input for equalizing voltages of the bit line and the further bit line under control of an equalizing signal.
Claim 7
Dependent Claim
53 words
The circuit of claim 3, wherein the means for precharging has a first discharging path connected between the output and a reference node, and a second discharging path connected between the further output and the reference node for discharging and equalizing the output and the further output under control of an equalizing signal.
Claim 8
Dependent Claim
12 words
A voltage sense amplifier for use in the circuit of claim 3.
Claim 9
Dependent Claim
12 words
A voltage sense amplifier for use in the circuit of claim 4.
Claim 10
Dependent Claim
12 words
A voltage sense amplifier for use in the circuit of claim 5.
Claim 11
Dependent Claim
12 words
A voltage sense amplifier for use in the circuit of claim 6.
References Cited (Backward Citations)
US4910714A
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US5253137A
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US5534800A
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US5412607A
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JPH07141874A
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JPH0877780A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-09-15 | 2001-03-17 | 2001-09-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-09-15 | 2005-03-17 | 2005-09-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-09-15 | 2009-03-17 | 2009-09-16 | $7700.00 | Window Closed / Lapsed |