US5652720A — Electrically programmable memory with improved re…

Claim 1

Independent Claim 145 words

A method for writing a particular cell into a group of memory cells within a row of memory cells of an electrically programmable memory, each cell comprising only one floating gate transistor, comprising the steps of: reading a state of at least one of the memory cells within the row by using different read reference values to generate at least two readings for said at least one of the memory cells within the row; verifying the compatibility of the said at least two readings of the said at least one of the memory cells; when an absence of compatibility is found for the said at least one of the memory cells, rewriting at least the memory cells of the group of memory cells within the row in which the group of memory cells resides; and writing the particular cell into the group of memory cells.

Claim 2

Independent Claim 145 words

A method for writing a particular cell into a group of memory cells within a row of memory cells of an electrically programmable memory, each cell comprising only one floating gate transistor, comprising the steps of: reading a state of at least one of the memory cells within the row by using different read reference values to generate at least two readings for said at least one of the memory cells within the row; verifying the compatibility of the said at least two readings of the said at least one of the memory cells; when an absence of compatibility is found for the said at least one of the memory cells, rewriting at least the memory cells of the group of memory cells within the row in which the group of memory cells resides; and writing the particular cell into the group of memory cells.

Claim 3

Dependent Claim 111 words

The method of claim 1, wherein: the at least two readings includes three readings; and the step of reading a state of at least one of the memory cells includes comparing one of a read voltage and read current supplied by the one memory cell with one of a reference voltage and reference current, the one of a reference voltage and reference current being a central value for a first of the three readings, a first auxiliary value that is greater than the central value for a second of the three readings, and a second auxiliary value that is less than the central value for a third of the three readings.

Claim 4

Dependent Claim 70 words

The method of claim 2, further comprising the steps of: reading a previously stored value from each of the memory cells within the row by using the central value; storing the previously stored value for each of the memory cells in a register; and when the absence of compatibility is found for the one memory cell, rewriting the previously stored value into each of the memory cells within the row.

Claim 5

Dependent Claim 46 words

The method of claim 3, wherein, wherein the step of reading a previously stored value from each of the memory cells includes reading the previously stored value by using only the central value when the an absence of compatibility is found for the one memory cell.

Claim 6

Dependent Claim 61 words

The method of claim 3, wherein the step of reading the state of at least one of the memory cells includes reading a state of a second one of the at least one memory cells by using only two different read reference values to generate two readings, when the two different readings of the second cell are indicative of a non-compatibility.

Claim 7

Dependent Claim 47 words

The method of claim 1, wherein the step of reading the state of at least one of the memory cells includes reading a state of each of only a subset of the group of memory cells that does not include all of the group of memory cells.

Claim 8

Dependent Claim 26 words

The method of claim 1, wherein the rewriting of the at least one of memory cells is performed simultaneously with the writing of the particular cell.

Claim 9

Dependent Claim 77 words

An electrically programmable memory comprising: a plurality of memory cells arranged in rows; means for performing three successive reads of a memory cell of a row by applying three different reference potentials to a terminal of the memory cell to generate three readings prior to a write of a word into the row; and means for rewriting a word into the row when the three readings give non-compatible results for at least one cell of the row.

Claim 10

Dependent Claim 77 words

An electrically programmable memory comprising: a plurality of memory cells arranged in rows; means for performing three successive reads of a memory cell of a row by applying three different reference potentials to a terminal of the memory cell to generate three readings prior to a write of a word into the row; and means for rewriting a word into the row when the three readings give non-compatible results for at least one cell of the row.

Claim 11

Dependent Claim 30 words

The electrically programmable memory of claim 8, wherein the means for performing includes means for applying the three different reference potentials to a control gate terminal of the memory cell.

Claim 12

Dependent Claim 197 words

An electrically programmable memory comprising: a network of cells organized in rows of words; a read circuit, coupled to the network of cells, having an output that provides three different reference values to a first cell of the network of cells, to read three corresponding read values of the first cell; a register, coupled to the read circuit, that stores the three corresponding read values; a write sequencer, coupled to the network of cells, having an input that receives a write command to write an input word to a selected cell within a row of the memory, a first output that applies three different read values to at least one cell within the row to read three read results of the at least one cell, a second output that provides a rewrite to the defective cell within the row in response to a systematic rewrite command, and a third output that writes the input word to the write cell; and means, coupled to the write sequencer, for comparing the three read results to determine whether the defective cell is detected, and for providing the systematic rewrite command to the write sequencer when the defective cell is detected.

Claim 13

Dependent Claim 197 words

An electrically programmable memory comprising: a network of cells organized in rows of words; a read circuit, coupled to the network of cells, having an output that provides three different reference values to a first cell of the network of cells, to read three corresponding read values of the first cell; a register, coupled to the read circuit, that stores the three corresponding read values; a write sequencer, coupled to the network of cells, having an input that receives a write command to write an input word to a selected cell within a row of the memory, a first output that applies three different read values to at least one cell within the row to read three read results of the at least one cell, a second output that provides a rewrite to the defective cell within the row in response to a systematic rewrite command, and a third output that writes the input word to the write cell; and means, coupled to the write sequencer, for comparing the three read results to determine whether the defective cell is detected, and for providing the systematic rewrite command to the write sequencer when the defective cell is detected.

Claim 14

Dependent Claim 28 words

The electrically programmable memory of claim 8, wherein the means for rewriting includes means for rewriting a value of the word that was previously stored in the row.

Claim 15

Dependent Claim 29 words

The electrically programmable memory of claim 11, further comprising means for determining the value of the word that was previously stored in the row based upon the three readings.

Claim 16

Dependent Claim 58 words

The electrically programmable memory of claim 8, wherein the three different reference potentials include a central value that is a midpoint between a programming threshold voltage and an erasing threshold voltage of the memory cell, a first auxiliary value that is greater than the central value, and a second auxiliary value that is less than the central value.

Claim 17

Dependent Claim 43 words

The electrically programmable memory of claim 8, wherein the means for performing three successive reads includes means for performing only first and second successive reads on a particular memory cell of the row when the first and second successive reads give non-compatible results.

Claim 18

Dependent Claim 25 words

The electrically programmable memory of claim 10, wherein the second output of the write sequencer provides a previously stored rewrite value to the defective cell.

Claim 19

Dependent Claim 23 words

The electrically programmable memory of claim 15, further comprising means for determining the previously stored rewrite value based upon the three read results.

Claim 20

Dependent Claim 63 words

The electrically programmable memory of claim 10, wherein the three different read values include a central value that is a midpoint between a programming threshold voltage and an erasing threshold voltage of a memory cell within the network of cells, a first auxiliary value that is greater than the central value, and a second auxiliary value that is less than the central value.

Claim 21

Dependent Claim 59 words

The electrically programmable memory of claim 10, wherein: the means for comparing the three read results includes means for comparing the first two of the three read results to determine whether the defective cell is detected; and the first output of the write sequencer provides only two of the three different read values when the defective cell is detected.

Claim 22

Dependent Claim 28 words

The electrically programmable memory of claim 10, wherein the output of the read circuit provides three different reference values to a control gate terminal of the first cell.

Claim 23

Independent Claim 78 words

A method for determining a degradation of a memory device, the method comprising the steps of: applying a first voltage to a memory cell within the memory device to generate a first read value of the memory cell; applying a second voltage that is different from the first voltage to the memory cell within the memory device to generate a second read value of the memory cell; and comparing the first read value to the second read value.

Claim 24

Independent Claim 78 words

A method for determining a degradation of a memory device, the method comprising the steps of: applying a first voltage to a memory cell within the memory device to generate a first read value of the memory cell; applying a second voltage that is different from the first voltage to the memory cell within the memory device to generate a second read value of the memory cell; and comparing the first read value to the second read value.

Claim 25

Dependent Claim 61 words

The method of claim 20, further comprising a step of applying a third voltage that is different from the first voltage to the memory cell within the memory device to generate a third read value of the memory cell, and wherein the step of comparing includes comparing the third read value to the first read value and the second read value.

Claim 26

Dependent Claim 77 words

The method of claim 10, wherein: the step of applying a first voltage includes applying a central value that is a midpoint between a programming threshold voltage and an erasing threshold voltage of the memory cell; the step of applying a second voltage includes applying a second auxiliary value that is less than the central value; and the step of applying a third voltage includes applying a third auxiliary value that is greater than the central value.

Claim 27

Dependent Claim 45 words

The method of claim 20, the method being further for correcting the degradation of the memory device, the method further comprising the step of rewriting a previously stored value into the memory cell when the step of comparing determines that the memory cell has degraded.

Claim 28

Dependent Claim 16 words

The method of claim 23, wherein the step of comparing includes determining the previously stored value.

Claim 29

Dependent Claim 22 words

The method of claim 23, further comprising a step, performed prior to the step of rewriting, of storing the previously stored value.

Claim 30

Dependent Claim 41 words

The method of claim 23, wherein the memory cell is within a row of memory cells within the memory device, the method further comprising the step of rewriting a previously stored value into each of the memory cells within the row.

Claim 31

Dependent Claim 49 words

The method of claim 20, wherein: the step of applying a first voltage includes applying the first voltage to a control gate terminal of the memory cell; and the step of applying a second voltage includes applying the second voltage to the control gate terminal of the memory cell.

Claim 32

Independent Claim 81 words

An apparatus for determining a degradation of a memory device, the apparatus comprising: means for applying a first voltage to a memory cell within the memory device to generate a first read value of the memory cell; means for applying a second voltage that is different from the first voltage to the memory cell within the memory device to generate a second read value of the memory cell; and means for comparing the first read value to the second read value.

Claim 33

Independent Claim 81 words

An apparatus for determining a degradation of a memory device, the apparatus comprising: means for applying a first voltage to a memory cell within the memory device to generate a first read value of the memory cell; means for applying a second voltage that is different from the first voltage to the memory cell within the memory device to generate a second read value of the memory cell; and means for comparing the first read value to the second read value.

Claim 34

Dependent Claim 62 words

The apparatus of claim 24, further comprising means for applying a third voltage that is different from the first voltage to the memory cell within the memory device to generate a third read value of the memory cell, and wherein the means for comparing includes means for comparing the third read value to the first read value and the second read value.

Claim 35

Dependent Claim 83 words

The apparatus of claim 29, wherein: the means for applying a first voltage includes means for applying a central value that is a midpoint between a programming threshold voltage and an erasing threshold voltage of the memory cell; the means for applying a second voltage includes means for applying a second auxiliary value that is less than the central value; and the means for applying a third voltage includes means for applying a third auxiliary value that is greater than the central value.

Claim 36

Dependent Claim 44 words

The apparatus of claim 28, the apparatus being further for correcting the degradation of the memory device, the apparatus further comprising means for rewriting a previously stored value into the memory cell when the means for comparing determines that the memory cell has degraded.

Claim 37

Dependent Claim 18 words

The apparatus of claim 31, wherein the means for comparing includes means for determining the previously stored value.

Claim 38

Dependent Claim 14 words

The apparatus of claim 32, further comprising means for storing the previously stored value.

Claim 39

Dependent Claim 40 words

The apparatus of claim 28, wherein the memory cell is within a row of memory cells within the memory device, the apparatus further comprising means for rewriting a previously stored value into each of the memory cells within the row.

Claim 40

Dependent Claim 11 words

The apparatus of claim 28, in combination with the memory device.

Claim 41

Dependent Claim 53 words

The apparatus of claim 28, wherein: the means for applying a first voltage includes means for applying the first voltage to a control gate terminal of the memory cell; and the means for applying a second voltage includes means for applying the second voltage to the control gate terminal of the memory cell.

Claim 42

Dependent Claim 63 words

A memory device comprising: a plurality of memory cells, each of which is readable by application of a read voltage; and means for determining a likelihood that the memory device has a degraded state by applying each of a plurality of read voltages to a terminal of a first cell of the plurality of memory cells to generate a plurality of read results.

Claim 43

Dependent Claim 63 words

A memory device comprising: a plurality of memory cells, each of which is readable by application of a read voltage; and means for determining a likelihood that the memory device has a degraded state by applying each of a plurality of read voltages to a terminal of a first cell of the plurality of memory cells to generate a plurality of read results.

Claim 44

Dependent Claim 58 words

The memory device of claim 37, wherein a group of the plurality of memory cells are arranged in a row that includes the cell, the memory device further comprising means for rewriting a previously stored value into each of the group of memory cells when the means for determining determines that the first cell has a degraded state.

Claim 45

Dependent Claim 57 words

The memory device of claim 37, wherein the plurality of read voltages includes a central value that is a midpoint between a programming threshold voltage and an erasing threshold voltage of the first cell, a first auxiliary value that is greater than the central value, and a second auxiliary value that is less than the central value.

Claim 46

Dependent Claim 25 words

The memory device of claim 37, wherein the means for determining includes means for comparing each of the plurality of read results with one another.

Claim 47

Dependent Claim 59 words

The memory device of claim 37, wherein: a group of the plurality of memory cells are arranged in a row that includes the first cell; and the means for determining includes means for determining the likelihood by applying each of the plurality of read voltages whenever a write is performed on any cell of the group of memory cells.

Claim 48

Dependent Claim 59 words

The memory device of claim 37, wherein: a group of the plurality of memory cells are arranged in a row that includes the first cell; and the means for determining includes means for determining the likelihood by applying each of the plurality of read voltages whenever a read is performed on any cell of the group of memory cells.

Claim 49

Dependent Claim 22 words

The memory device of claim 37, wherein the terminal of the first cell is a control gate terminal of the first cell.

Claim 50

Dependent Claim 94 words

A memory device comprising: a plurality of memory cells, each of which is readable by application of a read voltage; a read circuit, having an output that provides each of a plurality of read voltages to a terminal of a first cell of the plurality of memory cells to generate a plurality of read results; and a comparator circuit, having an input that receives the plurality of read results from the read circuit and an output that provides an indication that a first cell of the plurality of memory cells has a degraded state.

Claim 51

Dependent Claim 94 words

A memory device comprising: a plurality of memory cells, each of which is readable by application of a read voltage; a read circuit, having an output that provides each of a plurality of read voltages to a terminal of a first cell of the plurality of memory cells to generate a plurality of read results; and a comparator circuit, having an input that receives the plurality of read results from the read circuit and an output that provides an indication that a first cell of the plurality of memory cells has a degraded state.

Claim 52

Dependent Claim 67 words

The memory device of claim 44, wherein: a group of the plurality of memory cells are arranged in a row that includes the first cell; and the memory device further comprises a write circuit having an output that rewrites a previously stored value into each of the group of memory cells when the output of the comparator circuit indicates that the first cell has a degraded state.

Claim 53

Dependent Claim 57 words

The memory device of claim 44, wherein the plurality of read voltages includes a central value that is a midpoint between a programming threshold voltage and an erasing threshold voltage of the first cell, a first auxiliary value that is greater than the central value, and a second auxiliary value that is less than the central value.

Claim 54

Dependent Claim 58 words

The memory device of claim 44, wherein: a group of the plurality of memory cells are arranged in a row that includes the first cell; and the output of the read circuit provides each of the plurality of read voltages to the first cell whenever a write is performed on any cell of the group of memory cells.

Claim 55

Dependent Claim 58 words

The memory device of claim 44, wherein: a group of the plurality of memory cells are arranged in a row that includes the first cell; and the output of the read circuit provides each of the plurality of read voltages to the first cell whenever a read is performed on any cell of the group of memory cells.

Claim 56

Dependent Claim 22 words

The memory device of claim 44, wherein the terminal of the first cell is a control gate terminal of the first cell.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2000-07-28	2001-01-27	2001-07-29	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2004-07-28	2005-01-27	2005-07-29	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2008-07-28	2009-01-27	2009-07-29	$7700.00	Window Closed / Lapsed

Electrically programmable memory with improved retention of data and a method of writing data in said memory

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