Abstract A CMOS integrated circuit that comprises a graphics controller system that consists of a graphics engine and video memory together with some interface blocks, a PCMCIA host adapter, an infrared interface for generating video images on a LCD or CRT display unit, and a video stream interface for receiving video signals. Since the video memory is integrated on the same integrated circuit as the graphics controller, no package pins are required for the memory interface. The pins thus saved are used to provide access to an on-chip PCMCIA host adapter. The internal memory interface is 128 bits wide. Simultaneous performance improvement and power dissipation reduction is achieved because of the wide memory interface and the elimination of the large parasitic capacitances associated with a package pin connection.
An integrated circuit in a semiconductor substrate comprising a memory portion having a capacity of at least 2 megabits; and at least 30K logic gates with underlying substrate regions, said logic gates interconnected with said memory portion, said logic gates with a voltage supply having a coupling to said underlying substrate regions determined by a voltage of said underlying substrate regions.
Claim 2
Dependent Claim
61 words
An integrated circuit in a semiconductor substrate comprising a memory portion having a capacity of at least 2 megabits; and at least 30K logic gates with underlying substrate regions, said logic gates interconnected with said memory portion, said logic gates with a voltage supply having a coupling to said underlying substrate regions determined by a voltage of said underlying substrate regions.
Claim 3
Dependent Claim
24 words
The integrated circuit of claim 1 comprising at least 40K logic gates; and said memory portion has a capacity of at least 7.3 megabits.