Patent US5650360A successfully refreshed from Google Patents.
US5650360A
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US
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Method for manufacturing semiconductor device with multilayer wiring structure, including improved step of forming insulating film which covers wiring layer
Assignee: Toshiba Corp
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Filing: 1996-02-09
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Granted: 1997-07-22
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Expires: 2016-02-09
Abstract
Abstract The present invention provides a method for manufacturing a semiconductor device having a multilayer wiring structure, in which the step of forming an insulating film for covering a wiring layer is improved. In the method a wiring pattern is formed on an insulating film provided on a semiconductor substrate, SiH 4 gas and H 2 O 2 are introduced into a reaction chamber in which the semiconductor substrate provided with the wiring pattern is placed, and are reacted with each other under a negative pressure of 665 Pa or less at a temperature falling within a range from -10° C. to +10° C., thereby forming a reflow SiO 2 film of a reflow configuration on the wiring pattern such that it does not completely cover the wiring pattern, and a plasma CVD insulating film is continuously deposited on the reflow SiO 2 film on the semiconductor substrate by plasma CVD under a negative pressure.
Inventors
- 👤 Ken-ichi Tomita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 08:42
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/66; H10P14/662; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/6336; H10P14/668; H10P14/6681; H10P14/6682; H10P14/69; H10P14/692; H10P14/6921; H10P14/69215; H10P14/694; H10P14/6943; H10P14/69433
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
178 words
A method for manufacturing a semiconductor device having a multilayer wiring structure, in which the step of forming a insulating film for covering a wiring layer is improved, comprising the steps of: forming a wiring pattern on an insulating film provided on a semiconductor substrate; forming a reflow film by introducing SiH 4 gas and H 2 O 2 into a reaction chamber in which the semiconductor substrate provided with the wiring pattern is placed, and by reacting them with each other under a negative pressure of 665 Pa or less and at a temperature falling within a range from -10° C. to +10° C., thereby forming a reflow SiO 2 film of a reflow configuration on the wiring pattern leaving side portions of the wiring pattern partially exposed; and forming a plasma CVD insulating film by depositing continuously the plasma CVD insulating film on the reflow SiO 2 film on the semiconductor substrate by plasma CVD under a negative such that the plasma CVD insulating film covers the partially exposed side portions of the wiring pattern pressure.
Claim 2
Independent Claim
178 words
A method for manufacturing a semiconductor device having a multilayer wiring structure, in which the step of forming a insulating film for covering a wiring layer is improved, comprising the steps of: forming a wiring pattern on an insulating film provided on a semiconductor substrate; forming a reflow film by introducing SiH 4 gas and H 2 O 2 into a reaction chamber in which the semiconductor substrate provided with the wiring pattern is placed, and by reacting them with each other under a negative pressure of 665 Pa or less and at a temperature falling within a range from -10° C. to +10° C., thereby forming a reflow SiO 2 film of a reflow configuration on the wiring pattern leaving side portions of the wiring pattern partially exposed; and forming a plasma CVD insulating film by depositing continuously the plasma CVD insulating film on the reflow SiO 2 film on the semiconductor substrate by plasma CVD under a negative such that the plasma CVD insulating film covers the partially exposed side portions of the wiring pattern pressure.
Claim 3
Dependent Claim
47 words
The method according to claim 1, wherein in the plasma CVD insulating film-forming step, SiH 4 gas and N 2 O gas are reacted with each other at a temperature falling within a range from 300° C. to 400° C., thereby forming a plasma CVD-SiO 2 film.
Claim 4
Dependent Claim
45 words
The method according to claim 1, wherein in the plasma CVD insulating film-forming step, SiH 4 gas and NH 3 gas are reacted with each other at a temperature falling within a range from 300° C. to 400° C., thereby forming a plasma CVD-SiN film.
Claim 5
Dependent Claim
45 words
The method according to claim 1, wherein in the plasma CVD insulating film-forming step, TEOS gas and O 2 gas are reacted with each other at a temperature falling within a range from 300° C. to 400° C., thereby forming a plasma CVD-SiO 2 film.
Claim 6
Independent Claim
202 words
A method for manufacturing a semiconductor device having a multilayer wiring structure, in which the step of forming a insulating film for covering a wiring layer is improved, comprising the steps of: forming a wiring pattern on an insulating film provided on a semiconductor substrate; forming a reflow film by introducing SiH 4 gas and H 2 O 2 into a reaction chamber in which the semiconductor substrate provided with the wiring pattern is placed, and by reacting them with each other under a negative pressure of 665 Pa or less and at a temperature falling within a range from -10° C. to +10° C., thereby forming a reflow SiO 2 film of a reflow configuration on the wiring pattern leaving side portions of the wiring pattern partially exposed; forming a plasma CVD insulating film by depositing continuously the plasma CVD insulating film on the reflow SiO 2 film on the semiconductor substrate by plasma CVD under a negative such that the plasma CVD insulating film covers the partially exposed side portions of the wiring pattern pressure; and heating the resultant semiconductor substrate for 30 minutes or more at a high temperature falling within a range from 400° C. to 450° C.
Claim 7
Independent Claim
202 words
A method for manufacturing a semiconductor device having a multilayer wiring structure, in which the step of forming a insulating film for covering a wiring layer is improved, comprising the steps of: forming a wiring pattern on an insulating film provided on a semiconductor substrate; forming a reflow film by introducing SiH 4 gas and H 2 O 2 into a reaction chamber in which the semiconductor substrate provided with the wiring pattern is placed, and by reacting them with each other under a negative pressure of 665 Pa or less and at a temperature falling within a range from -10° C. to +10° C., thereby forming a reflow SiO 2 film of a reflow configuration on the wiring pattern leaving side portions of the wiring pattern partially exposed; forming a plasma CVD insulating film by depositing continuously the plasma CVD insulating film on the reflow SiO 2 film on the semiconductor substrate by plasma CVD under a negative such that the plasma CVD insulating film covers the partially exposed side portions of the wiring pattern pressure; and heating the resultant semiconductor substrate for 30 minutes or more at a high temperature falling within a range from 400° C. to 450° C.
Claim 8
Dependent Claim
47 words
The method according to claim 5, wherein in the plasma CVD insulating film-forming step, SiH 4 gas and N 2 O gas are reacted with each other at a temperature falling within a range from 300° C. to 400° C., thereby forming a plasma CVD-SiO 2 film.
Claim 9
Dependent Claim
45 words
The method according to claim 5, wherein in the plasma CVD insulating film-forming step, SiH 4 gas and NH 3 gas are reacted with each other at a temperature falling within a range from 300° C. to 400° C., thereby forming a plasma CVD-SiN film.
Claim 10
Dependent Claim
45 words
The method according to claim 5, wherein in the plasma CVD insulating film-forming step, TEOS gas and O 2 gas are reacted with each other at a temperature falling within a range from 300° C. to 400° C., thereby forming a plasma CVD-SiO 2 film.
References Cited (Backward Citations)
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