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US5644540A Expired / Lapsed US ⏱️ 0.0 years remaining

Redundancy elements using thin film transistors (TFTs)

Assignee: Micron Technology Inc
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Filing: 1995-02-17
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Granted: 1997-07-01
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Expires: 2015-02-17
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Abstract

Abstract An embodiment of the present invention describes a redundancy repair circuit fabricated in a Static Random Access Memory (SRAM) semiconductor device, with the redundancy repair circuit comprising: a plurality of thin film transistors (TFTs); a programming pad connecting to serially connected control gates of the plurality of TFTs; the plurality of TFTs having their individual source/drain terminals connecting between substitution logic and an address multiplexer. The redundancy repair circuit is operated by a method for shifting the threshold voltages of the TFTs using a programming pad connected serially to the control gates of a plurality of TFTs; the plurality of TFTs having their individual output terminals connecting between substitution logic and an address multiplexer; selecting an individual TFT by the address multiplexer; shorting at least one of the output terminals of the selected TFT to approximately a 5 V potential; shorting the output terminals of the remaining (non-selected) TFTs to approximately a 0 V potential; and applying a programming signal to the programming pad, the programming signal is sufficient to cause the threshold voltage of the selected TFT to shift approximately 1 V by injecting electrons into the TFT's gate dielectric region while not effecting the threshold voltage of each individual said non-selected TFTs.

Inventors

  • 👤 Monte Manning

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 08:04
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/70; G11C29/78; G11C29/785; G11C29/789; G11C16/00; G11C16/02; G11C16/04; G11C16/0466

Claims Analysis

Total Claims: 30
Claim 1
Independent Claim 92 words
A method for using field effect transistors (FETs) as programmable redundancy elements in a redundancy repair circuit having a plurality of FETs, said method comprising: applying a first potential to an output terminal of each FET selected for programming; and applying a programming signal to the gate of each said selected FET that is sufficient to cause the threshold voltage of each selected FET to shift by injecting charge into the FET's gate insulation region such that the shift in threshold voltage is detectable from the threshold voltage of a non-selected FET.
Claim 2
Independent Claim 92 words
A method for using field effect transistors (FETs) as programmable redundancy elements in a redundancy repair circuit having a plurality of FETs, said method comprising: applying a first potential to an output terminal of each FET selected for programming; and applying a programming signal to the gate of each said selected FET that is sufficient to cause the threshold voltage of each selected FET to shift by injecting charge into the FET's gate insulation region such that the shift in threshold voltage is detectable from the threshold voltage of a non-selected FET.
Claim 3
Dependent Claim 13 words
The method of claim 1, wherein said FETs comprise thin film transistors (TFTs).
Claim 4
Dependent Claim 13 words
The method of claim 1, wherein said programming signal comprises a voltage source.
Claim 5
Dependent Claim 13 words
The method of claim 1, wherein said programming signal comprises a current source.
Claim 6
Independent Claim 146 words
A method for shifting the threshold voltages of field effect transistors (FETs) in a redundancy repair circuit fabricated in a semiconductor device, said method comprising: using a programming pad connected serially to the control gates of a plurality of FETs; selecting individual FETs; shorting at least one of the output terminals of each selected FET to a first potential that is approximately at 5 V; shorting the output terminals of the remaining (non-selected) FETs to a second potential that is approximately 0 V and thereby producing an approximate 5 V offset between said first and second potentials; and applying a programming signal to said programming pad, said programming signal is sufficient to cause the threshold voltage of each selected FET to shift approximately 1 V by injecting electrons into the FET's gate dielectric region while not effecting the individual threshold voltage of each said non-selected FETs.
Claim 7
Independent Claim 146 words
A method for shifting the threshold voltages of field effect transistors (FETs) in a redundancy repair circuit fabricated in a semiconductor device, said method comprising: using a programming pad connected serially to the control gates of a plurality of FETs; selecting individual FETs; shorting at least one of the output terminals of each selected FET to a first potential that is approximately at 5 V; shorting the output terminals of the remaining (non-selected) FETs to a second potential that is approximately 0 V and thereby producing an approximate 5 V offset between said first and second potentials; and applying a programming signal to said programming pad, said programming signal is sufficient to cause the threshold voltage of each selected FET to shift approximately 1 V by injecting electrons into the FET's gate dielectric region while not effecting the individual threshold voltage of each said non-selected FETs.
Claim 8
Dependent Claim 13 words
The method of claim 5, wherein said FETs comprise thin film transistors (TFTs).
Claim 9
Dependent Claim 15 words
The method of claim 5, wherein said first potential comprises the semiconductor device's operating potential.
Claim 10
Dependent Claim 15 words
The method of claim 5, wherein said second potential comprises the semiconductor device's ground potential.
Claim 11
Dependent Claim 13 words
The method of claim 5, wherein said programming signal comprises a voltage source.
Claim 12
Dependent Claim 13 words
The method of claim 5, wherein said programming signal comprises a current source.
Claim 13
Dependent Claim 16 words
The method of claim 5, wherein said method is performed after said semiconductor device is packaged.
Claim 14
Dependent Claim 25 words
The method of claim 6, wherein said TFT's gate dielectric comprises at least one dielectric layer selected from the group consisting of oxide or nitride.
Claim 15
Dependent Claim 14 words
The method of claim 5, wherein said output terminals comprise source and drain terminals.
Claim 16
Dependent Claim 18 words
The method of claim 5, wherein said semiconductor device comprises a Static Random Access Memory (SRAM) semiconductor device.
Claim 17
Independent Claim 81 words
A method for using p-channel field effect transistors (FETs) as programmable redundancy elements in a redundancy repair circuit, said method comprising: applying a first potential to an output terminal of each p-channel FET selected for programming; and applying a programming signal to the gate of each said selected p-channel FET that is sufficient to shift the threshold voltage of each selected p-channel FET such that the shift in threshold voltage is detectable from the threshold voltage of a non-selected p-channel FET.
Claim 18
Independent Claim 81 words
A method for using p-channel field effect transistors (FETs) as programmable redundancy elements in a redundancy repair circuit, said method comprising: applying a first potential to an output terminal of each p-channel FET selected for programming; and applying a programming signal to the gate of each said selected p-channel FET that is sufficient to shift the threshold voltage of each selected p-channel FET such that the shift in threshold voltage is detectable from the threshold voltage of a non-selected p-channel FET.
Claim 19
Dependent Claim 13 words
The method of claim 15, wherein said programming signal comprises a voltage source.
Claim 20
Dependent Claim 13 words
The method of claim 15, wherein said programming signal comprises a current source.
Claim 21
Independent Claim 154 words
A method for shifting the threshold voltages of p-channel field effect transistors (FETs) in a redundancy repair circuit fabricated in a semiconductor device, said method comprising: using a programming pad connected serially to the control gates of a plurality of p-channel FETs; selecting individual p-channel FETs; shorting at least one of the output terminals of each selected p-channel FET to a first potential that is approximately at 5 V; shorting the output terminals of the remaining (non-selected) p-channel FETs to a second potential that is approximately 0 V and thereby producing an approximate 5 V offset between said first and second potentials; and applying a programming signal to said programming pad, said programming signal is sufficient to cause the threshold voltage of each selected p-channel FET to shift approximately 1 V by injecting electrons into the p-channel FET's gate dielectric region while not effecting the individual threshold voltage of each said non-selected p-channel FETs.
Claim 22
Independent Claim 154 words
A method for shifting the threshold voltages of p-channel field effect transistors (FETs) in a redundancy repair circuit fabricated in a semiconductor device, said method comprising: using a programming pad connected serially to the control gates of a plurality of p-channel FETs; selecting individual p-channel FETs; shorting at least one of the output terminals of each selected p-channel FET to a first potential that is approximately at 5 V; shorting the output terminals of the remaining (non-selected) p-channel FETs to a second potential that is approximately 0 V and thereby producing an approximate 5 V offset between said first and second potentials; and applying a programming signal to said programming pad, said programming signal is sufficient to cause the threshold voltage of each selected p-channel FET to shift approximately 1 V by injecting electrons into the p-channel FET's gate dielectric region while not effecting the individual threshold voltage of each said non-selected p-channel FETs.
Claim 23
Dependent Claim 15 words
The method of claim 18, wherein said first potential comprises the semiconductor device's operating potential.
Claim 24
Dependent Claim 15 words
The method of claim 18, wherein said second potential comprises the semiconductor device's ground potential.
Claim 25
Dependent Claim 13 words
The method of claim 18, wherein said programming signal comprises a voltage source.
Claim 26
Dependent Claim 13 words
The method of claim 18, wherein said programming signal comprises a current source.
Claim 27
Dependent Claim 16 words
The method of claim 18, wherein said method is performed after said semiconductor device is packaged.
Claim 28
Dependent Claim 26 words
The method of claim 18, wherein said p-channel FET's gate dielectric comprises at least one dielectric layer selected from the group consisting of oxide or nitride.
Claim 29
Dependent Claim 14 words
The method of claim 18, wherein said output terminals comprise source and drain terminals.
Claim 30
Dependent Claim 18 words
The method of claim 18, wherein said semiconductor device comprises a Static Random Access Memory (SRAM) semiconductor device.

References Cited (Backward Citations)

US4422161A Cited
US4791615A Cited
US5045720A Cited
US5172339A Cited
US5392245A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-06-30 2000-12-30 2001-07-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-06-30 2004-12-30 2005-07-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-06-30 2008-12-30 2009-07-01 $7700.00 Window Closed / Lapsed

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