Method of making a contact hole in a semiconductor device

Claim 1

A method of making a self-aligning contact hole in a semiconductor device with multi-layer interconnections, comprising the steps of: forming a first electrically conductive interconnection layer on a first insulating layer formed on a lower interconnection layer; forming a second insulating layer on the first electrically conductive interconnection layer; forming an antireflection layer on the second insulating layer; patterning the first electrically conductive interconnection layer, the second insulating layer and the antireflection layer to form a stacked film composed of the first electrically conductive interconnection layer, the second insulating layer and the antireflection layer; depositing a third insulating layer and etching back to form a sidewall on the stacked film; forming an interlayer insulating layer on an entire surface of the stacked film having the sidewall formed thereon and the first insulating layer; patterning the interlayer insulating layer to define a contact hole region and, using the antireflection layer as an etching stopper, etching by RIE to form a self-aligning contact hole to expose a selected portion of the lower interconnection layer using the sidewall as a mask; and depositing a second electrically conductive interconnection layer in the contact hole at the exposed portion of the lower interconnection layer.

Claim 2

A method of making a self-aligning contact hole in a semiconductor device with multi-layer interconnections, comprising the steps of: forming a first electrically conductive interconnection layer on a first insulating layer formed on a lower interconnection layer; forming a second insulating layer on the first electrically conductive interconnection layer; forming an antireflection layer on the second insulating layer; patterning the first electrically conductive interconnection layer, the second insulating layer and the antireflection layer to form a stacked film composed of the first electrically conductive interconnection layer, the second insulating layer and the antireflection layer; depositing a third insulating layer and etching back to form a sidewall on the stacked film; forming an interlayer insulating layer on an entire surface of the stacked film having the sidewall formed thereon and the first insulating layer; patterning the interlayer insulating layer to define a contact hole region and, using the antireflection layer as an etching stopper, etching by RIE to form a self-aligning contact hole to expose a selected portion of the lower interconnection layer using the sidewall as a mask; and depositing a second electrically conductive interconnection layer in the contact hole at the exposed portion of the lower interconnection layer.