US5641983A
Expired / Lapsed
US
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Semiconductor device having a gate electrode having a low dopant concentration
Assignee: Seiko Epson Corp
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Filing: 1995-10-26
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Granted: 1997-06-24
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Expires: 2015-10-26
Abstract
Abstract In a CMOS-element-containing semiconductor device, the CMOS element comprises: a silicon substrate; an n-channel MOS element formed on the silicon substrate and including an n-type source/drain region, a gate oxide film and a gate electrode; a p-channel MOS element formed on the silicon substrate and including a p-type source/drain region, a gate oxide film and a gate electrode; and a gate wiring layer electrically interconnecting the gate electrode of the n-channel MOS element and the gate electrode of the p-channel MOS element with one another. At least one of the gate electrodes and the gate wiring layer include at least in part a metal silicide layer. The gate electrodes and the gate wiring layer contain impurities consisting of at least one of a III group dopant and a V group dopant in a total concentration of at most 3×10 20 atoms cm -3 .
Inventors
- 👤 Juri Kato
- 👤 Kazuo Tanaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 10:13
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/661; H10D64/662; H10D64/663; H10D64/671; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0172; H10D84/0174; H10D84/02; H10D84/03; H10D84/038
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
226 words
A semiconductor device containing a CMOS element, wherein said CMOS element comprises: (a) a silicon substrate; (b) an n-channel MOS element formed on said silicon substrate and including an n-type source region and an n-type drain region, a gate oxide film and a gate electrode; (c) a p-channel MOS element formed on said silicon substrate and including a p-type source region and a p-type drain region, a gate oxide film and a gate electrode; (d) a gate wiring layer having a first portion electrically connected to said gate electrode of said n-channel MOS element and a second portion electrically connected to said gate electrode of said p-channel MOS element, said first and second portions of said gate wiring layer being electrically interconnected and non-overlapping, said first portion of said gate wiring layer substantially containing a first impurity and said second portion of said gate wiring layer substantially containing a second impurity; and (e) said gate wiring layer including a metal silicide layer containing the first and the second impurities, said first and said second impurities being a V group dopant and a III group dopant, respectively, each of the first and second impurities having a total concentration of at most 3×10 20 atoms cm -3 , the first and second impurities of said first and second portions of said gate wiring layer, respectively, being substantially separated.
Claim 2
Dependent Claim
226 words
A semiconductor device containing a CMOS element, wherein said CMOS element comprises: (a) a silicon substrate; (b) an n-channel MOS element formed on said silicon substrate and including an n-type source region and an n-type drain region, a gate oxide film and a gate electrode; (c) a p-channel MOS element formed on said silicon substrate and including a p-type source region and a p-type drain region, a gate oxide film and a gate electrode; (d) a gate wiring layer having a first portion electrically connected to said gate electrode of said n-channel MOS element and a second portion electrically connected to said gate electrode of said p-channel MOS element, said first and second portions of said gate wiring layer being electrically interconnected and non-overlapping, said first portion of said gate wiring layer substantially containing a first impurity and said second portion of said gate wiring layer substantially containing a second impurity; and (e) said gate wiring layer including a metal silicide layer containing the first and the second impurities, said first and said second impurities being a V group dopant and a III group dopant, respectively, each of the first and second impurities having a total concentration of at most 3×10 20 atoms cm -3 , the first and second impurities of said first and second portions of said gate wiring layer, respectively, being substantially separated.
Claim 3
Dependent Claim
21 words
A semiconductor device according to claim 1, wherein said gate electrodes and said gate wiring layer include the metal silicide layer.
Claim 4
Dependent Claim
32 words
A semiconductor device according to claim 1, wherein said gate electrodes and said gate wiring layer are in a laminate polycide structure composed of a polysilicon layer and the metal silicide layer.
Claim 5
Dependent Claim
45 words
A semiconductor device according to claim 1, wherein said V group dopant consists of at least one selected from the group of arsenic, phosphorus and antimony, and said III group dopant consists of at least one selected from the group of boron and halogenated boron.
Claim 6
Dependent Claim
17 words
A semiconductor device according to claim 4, wherein said halogenated boron is boron fluoride (BF 2 ).
Claim 7
Dependent Claim
27 words
A semiconductor device according to claim 1, wherein the total concentration of said first and said second impurities is at most 1×10 18 atoms cm -3 .
Claim 8
Dependent Claim
27 words
A semiconductor device according to claim 6, wherein the total concentration of said first and said second impurities is at most 1×10 16 atoms cm -3 .
Claim 9
Dependent Claim
41 words
A semiconductor device according to claim 1, wherein the concentration of said III group dopant is at most 1.9×10 20 atoms cm -3 , and the concentration of said V group dopant is at most 2.9×10 20 atoms cm -3 .
Claim 10
Dependent Claim
38 words
A semiconductor device according to claim 1, wherein said III group dopant is boron fluoride, a concentration of said boron in said gate electrode of said p-channel MOS element being at most 3.3×10 19 atoms cm -3 .
Claim 11
Dependent Claim
40 words
A semiconductor device according to claim 1, wherein the metal of said metal silicide layer consists at least one selected from the group of molybdenum, tungsten, chrome, nickel, titanium, vanadium, copper, gold, platinum, lead, palladium, manganese, iron, cobalt and aluminum.
Claim 12
Dependent Claim
39 words
A semiconductor device according to claim 1, wherein said gate electrodes are devoid of at least one of the dopants doped into the p-type source region, the p-type drain region, the n-type source region, and the n-type drain region.
References Cited (Backward Citations)
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