Patent US5640106A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5640106A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and structure for loading data into several IC devices

Assignee: Xilinx Inc
•
Filing: 1995-05-26
•
Granted: 1997-06-17
•
Expires: 2015-05-26
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An apparatus and method for decreasing the amount of time necessary to load configuration data into Field Programmable Gate Arrays (FPGAs) or other integrated circuit devices. In a preferred embodiment, serially arrayed FPGAs receive a concatenated stream of data from a common data bus. As a first FPGA reaches a loading-complete state, an enabling token is passed from the first FPGA to an enabling input on the next FPGA. The process repeats until all devices are completely loaded or fully configured.

Inventors

  • 👤 Charles R. Erickson
  • 👤 Lawrence Cy-Wei Hung

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 22:33
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; G; G06; G06F; G06F30/00; G06F30/30; G06F30/34; H03K19/17704

Claims Analysis

Total Claims: 59
Claim 1
Independent Claim 122 words
A method of loading data into a plurality of logic devices arranged in a circuit including a data bus, comprising the steps of: connecting each of said plurality of logic devices to the data bus, enabling a first one of said plurality of logic devices to receive data from the data bus, loading data into said first one of said logic devices from the data bus until said first one of said logic devices reaches a loading-complete state, enabling, across a first enable signal line, a second one of said plurality of logic devices, in response to said first one of said logic devices reaching said loading-complete state, loading data into said second one of said logic devices from the data bus.
Claim 2
Independent Claim 122 words
A method of loading data into a plurality of logic devices arranged in a circuit including a data bus, comprising the steps of: connecting each of said plurality of logic devices to the data bus, enabling a first one of said plurality of logic devices to receive data from the data bus, loading data into said first one of said logic devices from the data bus until said first one of said logic devices reaches a loading-complete state, enabling, across a first enable signal line, a second one of said plurality of logic devices, in response to said first one of said logic devices reaching said loading-complete state, loading data into said second one of said logic devices from the data bus.
Claim 3
Dependent Claim 14 words
The method of claim 1, wherein said logic devices comprise programmable logic array devices.
Claim 4
Dependent Claim 49 words
The method of claim 1, wherein said step of connecting each of said plurality of logic devices to the data bus comprises connecting a plurality of lines from each of said logic devices to said data bus to thereby load each of said devices through a parallel data stream.
Claim 5
Dependent Claim 47 words
The method of claim 1, wherein said step of connecting each of said plurality of logic devices to the data bus comprises connecting one line from each of said logic devices to said data bus to thereby load each of said devices through a serial data stream.
Claim 6
Dependent Claim 11 words
The method of claim 2, wherein said data comprises configuration data.
Claim 7
Dependent Claim 13 words
The method of claim 1, wherein said logic devices comprise data storage arrays.
Claim 8
Dependent Claim 24 words
The method of claim 1, further comprising the step of connecting each of said plurality of logic devices to a common parallel enable line.
Claim 9
Dependent Claim 31 words
The method of claim 1, further comprising the step of connecting said data bus to a data storage unit and loading data stored in said storage unit into said logic devices.
Claim 10
Dependent Claim 25 words
The method of claim 1, further comprising the step of initiating data processing after a last one of said logic devices reaches a loading-complete state.
Claim 11
Independent Claim 117 words
An apparatus for loading data into a plurality of logic devices comprising: a data bus, means for connecting each of said plurality of logic devices to the data bus, means for enabling a first one of said plurality of logic devices to receive data from the data bus, means for loading data into said first one of said logic devices from the data bus until said first one of said logic devices reaches a loading-complete state, a first enable signal line for connecting a second one of said plurality of logic devices to said first one of said logic devices, and means for loading data into said second one of said logic devices from the data bus.
Claim 12
Independent Claim 117 words
An apparatus for loading data into a plurality of logic devices comprising: a data bus, means for connecting each of said plurality of logic devices to the data bus, means for enabling a first one of said plurality of logic devices to receive data from the data bus, means for loading data into said first one of said logic devices from the data bus until said first one of said logic devices reaches a loading-complete state, a first enable signal line for connecting a second one of said plurality of logic devices to said first one of said logic devices, and means for loading data into said second one of said logic devices from the data bus.
Claim 13
Dependent Claim 15 words
The apparatus of claim 10, wherein said logic devices comprise field programmable gate array devices.
Claim 14
Dependent Claim 11 words
The apparatus of claim 11, wherein said data comprises configuration data.
Claim 15
Dependent Claim 13 words
The apparatus of claim 10, wherein said logic devices comprise data storage arrays.
Claim 16
Dependent Claim 22 words
The apparatus of claim 10, further comprising means for connecting each of said plurality of logic devices to a common enable line.
Claim 17
Dependent Claim 32 words
The apparatus of claim 10, further comprising means for connecting said data bus to a data storage unit and means for loading data stored in said storage unit into said logic devices.
Claim 18
Dependent Claim 24 words
The apparatus of claim 10, further comprising means for initiating data processing after a last one of said logic devices reaches a loading-complete state.
Claim 19
Dependent Claim 87 words
A circuit for enabling and loading a plurality of field-programmable gate arrays (FPGAs), wherein each FPGA has an enabling input and a loading-complete-indicating output, comprising: a data source, connected to each of said FPGAs; means for enabling a first FPGA; a serial connect line between said first FPGA and a second FPGA, wherein one end of said connect line is connected to the loading-complete-indicating output of said first FPGA and the other end of said connect line is connected to the enabling input of said second FPGA.
Claim 20
Dependent Claim 87 words
A circuit for enabling and loading a plurality of field-programmable gate arrays (FPGAs), wherein each FPGA has an enabling input and a loading-complete-indicating output, comprising: a data source, connected to each of said FPGAs; means for enabling a first FPGA; a serial connect line between said first FPGA and a second FPGA, wherein one end of said connect line is connected to the loading-complete-indicating output of said first FPGA and the other end of said connect line is connected to the enabling input of said second FPGA.
Claim 21
Dependent Claim 18 words
The circuit of claim 17, wherein said data source is connected to each of said FPGAs in parallel.
Claim 22
Dependent Claim 20 words
The circuit of claim 17, wherein said data source is connected to each of said FPGAs through a single line.
Claim 23
Dependent Claim 12 words
The circuit of claim 17, wherein said data source provides configuration data.
Claim 24
Dependent Claim 21 words
The circuit of claim 17, further comprising means for connecting each of said plurality of FPGAs to a common enable line.
Claim 25
Dependent Claim 23 words
The circuit of claim 17, further comprising means for initiating data processing after a last one of said FPGAs reaches a loading-complete state.
Claim 26
Independent Claim 141 words
A method of loading data into a plurality of logic devices arranged in a circuit including a data bus, comprising the steps of: connecting a plurality of lines in each of said plurality of logic devices to the data bus, enabling a first one of said plurality of logic devices to receive data from the data bus, loading data into said first one of said logic devices from the data bus in parallel across said plurality of lines until said first one of said logic devices reaches a loading-complete state, enabling, across a first enable signal line, a second one of said plurality of logic devices, in response to said first one of said logic devices reaching said loading-complete state, loading data into said second one of said logic devices from the data bus in parallel across said plurality of lines.
Claim 27
Independent Claim 141 words
A method of loading data into a plurality of logic devices arranged in a circuit including a data bus, comprising the steps of: connecting a plurality of lines in each of said plurality of logic devices to the data bus, enabling a first one of said plurality of logic devices to receive data from the data bus, loading data into said first one of said logic devices from the data bus in parallel across said plurality of lines until said first one of said logic devices reaches a loading-complete state, enabling, across a first enable signal line, a second one of said plurality of logic devices, in response to said first one of said logic devices reaching said loading-complete state, loading data into said second one of said logic devices from the data bus in parallel across said plurality of lines.
Claim 28
Dependent Claim 14 words
The method of claim 23, wherein said logic devices comprise programmable logic array devices.
Claim 29
Dependent Claim 11 words
The method of claim 24, wherein said data comprises configuration data.
Claim 30
Dependent Claim 13 words
The method of claim 23, wherein said logic devices comprise data storage arrays.
Claim 31
Dependent Claim 24 words
The method of claim 23, further comprising the step of connecting each of said plurality of logic devices to a common parallel enable line.
Claim 32
Dependent Claim 31 words
The method of claim 23, further comprising the step of connecting said data bus to a data storage unit and loading data stored in said storage unit into said logic devices.
Claim 33
Dependent Claim 25 words
The method of claim 23, further comprising the step of initiating data processing after a last one of said logic devices reaches a loading-complete state.
Claim 34
Independent Claim 136 words
An apparatus for loading data into a plurality of logic devices comprising: a data bus, means for connecting each of said plurality of logic devices to the data bus across a plurality of lines, means for enabling a first one of said plurality of logic devices to receive data from the data bus, means for loading data into said first one of said logic devices from the data bus in parallel across said plurality of lines until said first one of said logic devices reaches a loading-complete state, a first enable signal line for connecting a second one of said plurality of logic devices to said first one of said logic devices, and means for loading data into said second one of said logic devices from the data bus in parallel across said plurality of lines.
Claim 35
Independent Claim 136 words
An apparatus for loading data into a plurality of logic devices comprising: a data bus, means for connecting each of said plurality of logic devices to the data bus across a plurality of lines, means for enabling a first one of said plurality of logic devices to receive data from the data bus, means for loading data into said first one of said logic devices from the data bus in parallel across said plurality of lines until said first one of said logic devices reaches a loading-complete state, a first enable signal line for connecting a second one of said plurality of logic devices to said first one of said logic devices, and means for loading data into said second one of said logic devices from the data bus in parallel across said plurality of lines.
Claim 36
Dependent Claim 15 words
The apparatus of claim 30, wherein said logic devices comprise field programmable gate array devices.
Claim 37
Dependent Claim 11 words
The apparatus of claim 31, wherein said data comprises configuration data.
Claim 38
Dependent Claim 13 words
The apparatus of claim 30, wherein said logic devices comprise data storage arrays.
Claim 39
Dependent Claim 22 words
The apparatus of claim 30, further comprising means for connecting each of said plurality of logic devices to a common enable line.
Claim 40
Dependent Claim 32 words
The apparatus of claim 30, further comprising means for connecting said data bus to a data storage unit and means for loading data stored in said storage unit into said logic devices.
Claim 41
Dependent Claim 24 words
The apparatus of claim 30, further comprising means for initiating data processing after a last one of said logic devices reaches a loading-complete state.
Claim 42
Independent Claim 140 words
A method of loading data into a plurality of logic devices arranged in a circuit including a data bus, comprising the steps of: connecting each of said plurality of logic devices to the data bus, enabling a first one of said plurality of logic devices to receive data from the data bus, loading data into said first one of said logic devices from the data bus in either of a parallel and a serial fashion until said first one of said logic devices reaches a loading-complete state, enabling, across a first enable signal line, a second one of said plurality of logic devices, in response to said first one of said logic devices reaching said loading-complete state, loading data into said second one of said logic devices from the data bus in said either of said parallel and serial fashion.
Claim 43
Independent Claim 140 words
A method of loading data into a plurality of logic devices arranged in a circuit including a data bus, comprising the steps of: connecting each of said plurality of logic devices to the data bus, enabling a first one of said plurality of logic devices to receive data from the data bus, loading data into said first one of said logic devices from the data bus in either of a parallel and a serial fashion until said first one of said logic devices reaches a loading-complete state, enabling, across a first enable signal line, a second one of said plurality of logic devices, in response to said first one of said logic devices reaching said loading-complete state, loading data into said second one of said logic devices from the data bus in said either of said parallel and serial fashion.
Claim 44
Dependent Claim 14 words
The method of claim 37, wherein said logic devices comprise programmable logic array devices.
Claim 45
Dependent Claim 49 words
The method of claim 37, wherein said step of connecting each of said plurality of logic devices to the data bus comprises connecting a plurality of lines from each of said logic devices to said data bus to thereby load each of said devices through a parallel data stream.
Claim 46
Dependent Claim 47 words
The method of claim 37, wherein said step of connecting each of said plurality of logic devices to the data bus comprises connecting one line from each of said logic devices to said data bus to thereby load each of said devices through a serial data stream.
Claim 47
Dependent Claim 11 words
The method of claim 38, wherein said data comprises configuration data.
Claim 48
Dependent Claim 13 words
The method of claim 37, wherein said logic devices comprise data storage arrays.
Claim 49
Dependent Claim 24 words
The method of claim 37, further comprising the step of connecting each of said plurality of logic devices to a common parallel enable line.
Claim 50
Dependent Claim 31 words
The method of claim 37, further comprising the step of connecting said data bus to a data storage unit and loading data stored in said storage unit into said logic devices.
Claim 51
Dependent Claim 25 words
The method of claim 37, further comprising the step of initiating data processing after a last one of said logic devices reaches a loading-complete state.
Claim 52
Independent Claim 135 words
An apparatus for loading data into a plurality of logic devices comprising: a data bus, means for connecting each of said plurality of logic devices to the data bus, means for enabling a first one of said plurality of logic devices to receive data from the data bus, means for loading data into said first one of said logic devices from the data bus in either of a parallel and serial fashion until said first one of said logic devices reaches a loading-complete state, a first enable signal line for connecting a second one of said plurality of logic devices to said first one of said logic devices, and means for loading data into said second one of said logic devices from the data bus in said either of said parallel and said serial fashion.
Claim 53
Independent Claim 135 words
An apparatus for loading data into a plurality of logic devices comprising: a data bus, means for connecting each of said plurality of logic devices to the data bus, means for enabling a first one of said plurality of logic devices to receive data from the data bus, means for loading data into said first one of said logic devices from the data bus in either of a parallel and serial fashion until said first one of said logic devices reaches a loading-complete state, a first enable signal line for connecting a second one of said plurality of logic devices to said first one of said logic devices, and means for loading data into said second one of said logic devices from the data bus in said either of said parallel and said serial fashion.
Claim 54
Dependent Claim 15 words
The apparatus of claim 46, wherein said logic devices comprise field programmable gate array devices.
Claim 55
Dependent Claim 11 words
The apparatus of claim 47, wherein said data comprises configuration data.
Claim 56
Dependent Claim 13 words
The apparatus of claim 46, wherein said logic devices comprise data storage arrays.
Claim 57
Dependent Claim 22 words
The apparatus of claim 46, further comprising means for connecting each of said plurality of logic devices to a common enable line.
Claim 58
Dependent Claim 32 words
The apparatus of claim 46, further comprising means for connecting said data bus to a data storage unit and means for loading data stored in said storage unit into said logic devices.
Claim 59
Dependent Claim 24 words
The apparatus of claim 46, further comprising means for initiating data processing after a last one of said logic devices reaches a loading-complete state.

References Cited (Backward Citations)

US4963768A Cited
US4942319A Cited
US5394032A Cited
US5394031A Cited
US5493239A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-06-16 2000-12-16 2001-06-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-06-16 2004-12-16 2005-06-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-06-16 2008-12-16 2009-06-17 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag