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US5638319A Expired / Lapsed US ⏱️ 0.0 years remaining

Non-volatile random access memory and fabrication method thereof

Assignee: Sharp Corp
•
Filing: 1995-12-06
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Granted: 1997-06-10
•
Expires: 2015-12-06
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Abstract

Abstract A non-volatile random access memory comprises an MOS transistor having a gate insulation film formed on a semiconductor substrate, a gate electrode formed on the gate insulation film, and a pair of diffusion layers formed in the semiconductor substrate; and a ferroelectric capacitor having a bottom electrode connected to one of the diffusion layers of the MOS transistor, a capacitor ferroelectric film formed only on the bottom electrode, and a top electrode formed on the capacitor ferroelectric film; wherein at least side walls of the bottom electrode and the capacitor ferroelectric film are coated with lamination of a diffusion prevention film and a thin insulation film; an upper surface of the capacitor ferroelectric film is contacted with the top electrode; the other diffusion layer of the MOS transistor is connected to a bit line; the gate electrode is connected to a word line; and the top electrode of the ferroelectric capacitor is constituted so as to serve as a drive line.

Inventors

  • 👤 Shigeo Onishi
  • 👤 Kazuya Ishihara

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 01:28
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/31; H10B53/00; H10B53/30; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 161 words
A non-volatile random access memory comprising: an MOS transistor having a gate insulation film formed on a semiconductor substrate, a gate electrode formed on the gate insulation film, and a pair of diffusion layers formed in the semiconductor substrate; and a ferroelectric capacitor having a bottom electrode connected to one of the diffusion layers of the MOS transistor, a capacitor ferroelectric film formed only on the bottom electrode, and a top electrode formed on the capacitor ferroelectric film; wherein at least side walls of the bottom electrode and the capacitor ferroelectric film are coated with lamination of a diffusion prevention film and a thin insulation film; an upper surface of the capacitor ferroelectric film is contacted with the top electrode; the other diffusion layer of the MOS transistor is connected to a bit line; the gate electrode is connected to a word line; and the top electrode of the ferroelectric capacitor is constituted so as to serve as a drive line.
Claim 2
Dependent Claim 161 words
A non-volatile random access memory comprising: an MOS transistor having a gate insulation film formed on a semiconductor substrate, a gate electrode formed on the gate insulation film, and a pair of diffusion layers formed in the semiconductor substrate; and a ferroelectric capacitor having a bottom electrode connected to one of the diffusion layers of the MOS transistor, a capacitor ferroelectric film formed only on the bottom electrode, and a top electrode formed on the capacitor ferroelectric film; wherein at least side walls of the bottom electrode and the capacitor ferroelectric film are coated with lamination of a diffusion prevention film and a thin insulation film; an upper surface of the capacitor ferroelectric film is contacted with the top electrode; the other diffusion layer of the MOS transistor is connected to a bit line; the gate electrode is connected to a word line; and the top electrode of the ferroelectric capacitor is constituted so as to serve as a drive line.
Claim 3
Dependent Claim 38 words
A non-volatile random access memory as set forth in claim 1, wherein the diffusion prevention film is formed of a material selected from the group consisting of TiO 2 , ZrO 2 and Al 2 O 3 .
Claim 4
Dependent Claim 24 words
A non-volatile random access memory as set forth in claim 1, wherein the thin insulation film is formed of an SiO 2 or SiN.
Claim 5
Dependent Claim 43 words
A non-volatile random access memory as set forth in claim 1, wherein the diffusion prevention film is formed in the thickness of 300 Å to 1000 Å and the thin insulation film is formed in the thickness of 500 Å to 1500 Å.
Claim 6
Dependent Claim 157 words
A non-volatile random access memory comprising: an MOS transistor having a gate insulation film formed on a semiconductor substrate, a gate electrode formed on the gate insulation film, and a pair of diffusion layers formed in the semiconductor substrate; an interlayer insulation film covering the MOS transistor; and a ferroelectric capacitor having a bottom electrode connected to one of the diffusion layers of the MOS transistor through a contact hole formed in the interlayer insulation film on said one diffusion layer, a capacitor ferroelectric film covering the bottom electrode, and a top electrode formed on the capacitor ferroelectric film; wherein a diffusion prevention film is formed between the interlayer insulation film and the capacitor ferroelectric film; the other diffusion layer of the MOS transistor is connected to a bit line; the gate electrode is connected to a word line; and the top electrode of the ferroelectric capacitor is constituted so as to serve as a drive line.
Claim 7
Dependent Claim 157 words
A non-volatile random access memory comprising: an MOS transistor having a gate insulation film formed on a semiconductor substrate, a gate electrode formed on the gate insulation film, and a pair of diffusion layers formed in the semiconductor substrate; an interlayer insulation film covering the MOS transistor; and a ferroelectric capacitor having a bottom electrode connected to one of the diffusion layers of the MOS transistor through a contact hole formed in the interlayer insulation film on said one diffusion layer, a capacitor ferroelectric film covering the bottom electrode, and a top electrode formed on the capacitor ferroelectric film; wherein a diffusion prevention film is formed between the interlayer insulation film and the capacitor ferroelectric film; the other diffusion layer of the MOS transistor is connected to a bit line; the gate electrode is connected to a word line; and the top electrode of the ferroelectric capacitor is constituted so as to serve as a drive line.
Claim 8
Dependent Claim 43 words
A non-volatile random access memory as set forth in claim 5, wherein side walls of the capacitor ferroelectric film and the top electrode are covered with a spacer made of a material identical with or different from that of the diffusion prevention film.
Claim 9
Dependent Claim 38 words
A non-volatile random access memory as set forth in claim 5, wherein the diffusion prevention film is formed of a material selected from the group consisting of TiO 2 , ZrO 2 and Al 2 O 3 .
Claim 10
Dependent Claim 27 words
A non-volatile random access memory as set forth in claim 5, wherein the diffusion prevention film is formed in the thickness of 300 Å to 1000 Å.

References Cited (Backward Citations)

US5227855A Cited
JPH03296262A Cited
US5293510A Cited
US5369296A Cited
US5119154A Cited
JPH04356958A Cited
US5212620A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-06-09 2000-12-09 2001-06-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-06-09 2004-12-09 2005-06-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-06-09 2008-12-09 2009-06-10 $7700.00 Window Closed / Lapsed

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