Patent US5637893A successfully refreshed from Google Patents.
US5637893A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Interline-transfer CCD image sensor and method for fabricating the same
Assignee: NEC Corp
•
Filing: 1996-02-21
•
Granted: 1997-06-10
•
Expires: 2016-02-21
Abstract
Abstract A solid-state image sensor has a photodiode region, a vertical CCD register for transferring a charge received at the photodiode region, a read-out gate region for reading the charge out to the vertical CCD register, and an element isolation region for isolating the photodiode region and the vertical CCD register. Ion-implantation is carried out first for the element isolation region and, thereafter, the photodiode region and the vertical CCD register are formed. The element isolation region is in a two layer configuration having a P + -type region and a P-type region, and the P-type region is formed simultaneously with other regions including the read-out gate region. When the P-type region for the element isolation region is formed by ion-implantation before the formation of the photodiode region and the vertical CCD register, the fine patterning of the resist mask becomes unnecessary.
Inventors
- 👤 Masayuki Furumiya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 02:00
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/15; H10F39/152
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
301 words
A solid-state image sensor having a pixel which comprises: a photodiode region constituted by a first first-conductivity type region which is disposed in a second second-conductivity type region and which has a depth deeper than said second second-conductivity type region, and a second-conductivity type surface layer which is disposed on a surface portion of said first first-conductivity type region; a vertical CCD register including a second second-conductivity type well which is spaced from but adjacent to said photodiode region and which is disposed in said second second-conductivity type region and has a depth deeper and an impurity concentration higher than that of said second second-conductivity type region, and a buried channel layer constituted by a second first-conductivity type region which is disposed on a surface portion of said second second-conductivity type well and which has a depth shallower than that of said first first-conductivity type region; a read-out gate region constituted by a portion of said second second-conductivity type region interposed between said photodiode region and said buried channel layer; and a second-conductivity type element isolation region insulating said first first-conductivity type region and said buried channel layer; and said solid-state image sensor comprising: a first well which is constituted, together with said second second-conductivity type region, by a first second-conductivity type region which is disposed on a surface portion of a first-conductivity type semiconductor substrate, said second second-conductivity type region being disposed on a surface portion of said first second-conductivity type region and having an impurity concentration higher than that of the surface portion of said first second-conductivity type region; and a third second-conductivity type region which is formed by said second-conductivity type element isolation region on a surface of said second second-conductivity type region and which has an impurity concentration higher than that of said second second-conductivity type region.
Claim 2
Dependent Claim
301 words
A solid-state image sensor having a pixel which comprises: a photodiode region constituted by a first first-conductivity type region which is disposed in a second second-conductivity type region and which has a depth deeper than said second second-conductivity type region, and a second-conductivity type surface layer which is disposed on a surface portion of said first first-conductivity type region; a vertical CCD register including a second second-conductivity type well which is spaced from but adjacent to said photodiode region and which is disposed in said second second-conductivity type region and has a depth deeper and an impurity concentration higher than that of said second second-conductivity type region, and a buried channel layer constituted by a second first-conductivity type region which is disposed on a surface portion of said second second-conductivity type well and which has a depth shallower than that of said first first-conductivity type region; a read-out gate region constituted by a portion of said second second-conductivity type region interposed between said photodiode region and said buried channel layer; and a second-conductivity type element isolation region insulating said first first-conductivity type region and said buried channel layer; and said solid-state image sensor comprising: a first well which is constituted, together with said second second-conductivity type region, by a first second-conductivity type region which is disposed on a surface portion of a first-conductivity type semiconductor substrate, said second second-conductivity type region being disposed on a surface portion of said first second-conductivity type region and having an impurity concentration higher than that of the surface portion of said first second-conductivity type region; and a third second-conductivity type region which is formed by said second-conductivity type element isolation region on a surface of said second second-conductivity type region and which has an impurity concentration higher than that of said second second-conductivity type region.
Claim 3
Dependent Claim
211 words
A solid-state image sensor comprising: a first well constituted by a second-conductivity type region which is formed in a surface portion of a first-conductivity type semiconductor substrate; a pixel which includes a photodiode region constituted by a first first-conductivity type region which is formed in said second-conductivity type region, and a second-conductivity type surface layer which is formed in a surface portion of said first first-conductivity type region; a vertical CCD register including a second second-conductivity type well which is spaced from but adjacent to said photodiode region and which is disposed in a surface portion of said second-conductivity type region and has an impurity concentration higher than that of said second-conductivity type region, and a buried channel layer which is disposed in a surface portion of said second second-conductivity type well and has a depth shallower than said first first-conductivity type region; a read-out gate region constituted by a portion of said second-conductivity type region interposed between said photodiode region and said buried channel layer; and a second-conductivity type element isolation region insulating said first first-conductivity type region and said buried channel layer; and a high impurity concentration second-conductivity type region which is formed by said second-conductivity type element isolation region on a surface of said second second-conductivity type well.
Claim 4
Dependent Claim
211 words
A solid-state image sensor comprising: a first well constituted by a second-conductivity type region which is formed in a surface portion of a first-conductivity type semiconductor substrate; a pixel which includes a photodiode region constituted by a first first-conductivity type region which is formed in said second-conductivity type region, and a second-conductivity type surface layer which is formed in a surface portion of said first first-conductivity type region; a vertical CCD register including a second second-conductivity type well which is spaced from but adjacent to said photodiode region and which is disposed in a surface portion of said second-conductivity type region and has an impurity concentration higher than that of said second-conductivity type region, and a buried channel layer which is disposed in a surface portion of said second second-conductivity type well and has a depth shallower than said first first-conductivity type region; a read-out gate region constituted by a portion of said second-conductivity type region interposed between said photodiode region and said buried channel layer; and a second-conductivity type element isolation region insulating said first first-conductivity type region and said buried channel layer; and a high impurity concentration second-conductivity type region which is formed by said second-conductivity type element isolation region on a surface of said second second-conductivity type well.
References Cited (Backward Citations)
US4498013A
Cited
US4672455A
Cited
US4947224A
Cited
US5581099A
Cited
US5514887A
Cited
US5446297A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-06-09 | 2000-12-09 | 2001-06-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-06-09 | 2004-12-09 | 2005-06-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-06-09 | 2008-12-09 | 2009-06-10 | $7700.00 | Window Closed / Lapsed |