Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
367 words
A method for assigning unique addresses to devices on a bus in a computer system, wherein the computer system comprises a master coupled to the bus and a plurality of slaves coupled to the bus, the method comprising the steps of: the master issuing a first command to assign a unique address to one or more of said plurality of slaves coupled to the bus; the master requesting identification information from said one or more of said plurality of slaves on said bus using said unique address; said one or more of said plurality of slaves transmitting data to the master in response to said step of requesting information; said one or more of said plurality of slaves determining if an error occurred in said step of transmitting data; said slaves which detect an error in said step of transmitting ceasing to respond to said unique address, said slaves which detect an error each having a respective byte in error; said slaves which detect an error in said step of transmitting each disabling response to one or more subsequent first commands; a slave maintaining use of aid unique address if said slave determines that an error did not occur in said step of transmitting; and the master reputing said steps issuing said first command and requesting identification information until each of aid slaves receives a unique address wherein, for each of said one or more of said plurality of slaves, said step of determining if an error occurred in said step of transmitting data comprises: attempting to transmit a byte of data; reading a byte of data transmitted on said bus during said step of attempting to transmit said byte of data; and comparing said byte of data attempted to be transmitted with said byte of data read on said bus to determine if said byte of data attempted to be transmitted equals said byte of data read on said bus wherein said slaves which detect an error in said step of transmitting each compute a respective number N of leading correct bits in said respective byte in error; and said slaves which detect an error disable response to a subsequent N number of said first commands.
Claim 2
Independent Claim
367 words
A method for assigning unique addresses to devices on a bus in a computer system, wherein the computer system comprises a master coupled to the bus and a plurality of slaves coupled to the bus, the method comprising the steps of: the master issuing a first command to assign a unique address to one or more of said plurality of slaves coupled to the bus; the master requesting identification information from said one or more of said plurality of slaves on said bus using said unique address; said one or more of said plurality of slaves transmitting data to the master in response to said step of requesting information; said one or more of said plurality of slaves determining if an error occurred in said step of transmitting data; said slaves which detect an error in said step of transmitting ceasing to respond to said unique address, said slaves which detect an error each having a respective byte in error; said slaves which detect an error in said step of transmitting each disabling response to one or more subsequent first commands; a slave maintaining use of aid unique address if said slave determines that an error did not occur in said step of transmitting; and the master reputing said steps issuing said first command and requesting identification information until each of aid slaves receives a unique address wherein, for each of said one or more of said plurality of slaves, said step of determining if an error occurred in said step of transmitting data comprises: attempting to transmit a byte of data; reading a byte of data transmitted on said bus during said step of attempting to transmit said byte of data; and comparing said byte of data attempted to be transmitted with said byte of data read on said bus to determine if said byte of data attempted to be transmitted equals said byte of data read on said bus wherein said slaves which detect an error in said step of transmitting each compute a respective number N of leading correct bits in said respective byte in error; and said slaves which detect an error disable response to a subsequent N number of said first commands.
Claim 3
Dependent Claim
104 words
The method of claim 1, wherein each of said plurality of slaves begin operation at a class address; wherein said step of the master issuing a first command to assign a unique address to one or more of said plurality of slaves on the bus includes addressing said one or more of said plurality of slaves using said class address and assigning said one or more of said plurality of slaves at said class address said unique address; and wherein said slaves which detect an error in said step of transmitting cease responding to said unique address and resume responding to said class address.
Claim 4
Dependent Claim
90 words
The method of claim 1, further comprising: wherein said step of transmitting data to the master in response to said step of requesting information comprises said one or more of said plurality of slaves each transmitting a random byte; wherein said slaves which detect an error detect said error in transmitting said random byte of data in said step of transmitting data; and wherein said slaves which detect an error in said step of transmitting each compute said number N of leading correct bits in said random byte in error.
Claim 5
Dependent Claim
41 words
The method of claim 1, further comprising: said slaves which detect an error in said step of transmitting computing an amount of time; and said slaves which detect an error disabling response to subsequent first commands for said amount of time.
Claim 6
Dependent Claim
12 words
The method of claim 1, wherein said bus is a serial bus.
Claim 7
Independent Claim
15 words
The method of clam 5, wherein said bus utilizes an I 2 C serial protocol.
Claim 8
Independent Claim
15 words
The method of clam 5, wherein said bus utilizes an I 2 C serial protocol.
Claim 9
Dependent Claim
30 words
The method of claim 1, wherein said bus is a system management bus in said computer system, and wherein said plurality of slaves performing monitoring functions in said computer system.
Claim 10
Dependent Claim
17 words
The method of claim 1, wherein said method is performed periodically during operation of said computer system.
Claim 11
Dependent Claim
333 words
A computer system, comprising: a serial bus a plurality of devices coupled to the serial bus, wherein said plurality of devices begin operations at a common class address, the plurality of devices including a plurality of slaves; and a master coupled to the bus which assigns a different unique address to each of said plurality of devices coupled to the bus; wherein said master includes: means for assigning a unique address to one or more of the plurality of devices on the bus; and means for requesting identification information from said one or more of said plurality of devices on said bus using said unique address; wherein each of said plurality of slaves includes: means for receiving an assigned unique address and configuring to said unique address; means for transmitting data to the master in response to requests for information; means for determining if an error occurred during transmission of data, wherein each of said plurality of slaves which detect an error during transmission of data cease responding to said unique address and resume responding to said class address, and wherein each of said plurality of slaves which detect an error during transmission of data disable response to one or more subsequent first commands, wherein a slave maintains use of said unique address if said slave determines that an error did not occur; wherein said means for assigning a unique address and said means for requesting identification information alternately operate until each of said plurality of devices receives a unique address; wherein said means for determining if an error occurred comprises means for determining if an error occurred in a byte of data during transmission of data, wherein said slaves which detect an error each have a byte in error; wherein each of said slaves which detect an error during transmission compute a respective number N of leading correct bits in said byte in error; and said slaves which detect an error disable response to a subsequent N number of said first commands.
Claim 12
Dependent Claim
333 words
A computer system, comprising: a serial bus a plurality of devices coupled to the serial bus, wherein said plurality of devices begin operations at a common class address, the plurality of devices including a plurality of slaves; and a master coupled to the bus which assigns a different unique address to each of said plurality of devices coupled to the bus; wherein said master includes: means for assigning a unique address to one or more of the plurality of devices on the bus; and means for requesting identification information from said one or more of said plurality of devices on said bus using said unique address; wherein each of said plurality of slaves includes: means for receiving an assigned unique address and configuring to said unique address; means for transmitting data to the master in response to requests for information; means for determining if an error occurred during transmission of data, wherein each of said plurality of slaves which detect an error during transmission of data cease responding to said unique address and resume responding to said class address, and wherein each of said plurality of slaves which detect an error during transmission of data disable response to one or more subsequent first commands, wherein a slave maintains use of said unique address if said slave determines that an error did not occur; wherein said means for assigning a unique address and said means for requesting identification information alternately operate until each of said plurality of devices receives a unique address; wherein said means for determining if an error occurred comprises means for determining if an error occurred in a byte of data during transmission of data, wherein said slaves which detect an error each have a byte in error; wherein each of said slaves which detect an error during transmission compute a respective number N of leading correct bits in said byte in error; and said slaves which detect an error disable response to a subsequent N number of said first commands.
Claim 13
Dependent Claim
39 words
The computer system of claim 9, wherein said slaves which detect an error during transmission compute an amount of time; and wherein said slaves which detect an error disable response to subsequent first commands for said amount of time.
Claim 14
Dependent Claim
16 words
The computer system of claim 9, wherein said bus utilizes an I 2 C serial protocol.
Claim 15
Dependent Claim
31 words
The computer system of claim 9, wherein said bus is a system management bus in said computer system, and wherein said plurality of slaves perform monitoring functions in said computer system.