Patent DE86751C successfully refreshed from Google Patents.
Patent US97081A successfully refreshed from Google Patents.
Patent US38540A successfully refreshed from Google Patents.
Patent US5630102A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5630102A Expired / Lapsed US ⏱️ 0.0 years remaining

In-circuit-emulation event management system

Assignee: Intel Corp
•
Filing: 1994-12-19
•
Granted: 1997-05-13
•
Expires: 2014-12-19
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A microprocessor system utilizing an in-circuit emulator (ICE) to aid in testing and debugging by an external emulator. The microprocessor operates in two modes. One mode is emulation mode in which the microprocessor outputs trace information for allowing the emulator to reconstruct microprocessor execution, and the other mode is interrogation mode where the microprocessor ceases emulation mode, and allows the emulator to modify the state of the microprocessor or interrogate it. An ICEBRK signal is provided on the microprocessor to better handle transition from emulation to interrogation mode. An address mark counter and generator is provided to force the microprocessor to automatically issue an address mark message which includes the location of the microprocessor's instruction pointer. An AMCTRL bit may be further provided to allow a human user to selectively inhibit the issuance of an address mark. An ICELOCK signal is provided on the microprocessor to control the writing of control registers during hardware and software initialization that the microprocessor performs. A MSGFRM signal is provided to aid the emulator in capturing trace information generated at high frequencies (in excess of 40 MHz).

Inventors

  • 👤 Thomas M. Johnson
  • 👤 Aravindh Bakthavathsalu
  • 👤 Richard Brunner
  • 👤 Eliot Garbus
  • 👤 Byron Gillespie
  • 👤 Stephen J. Strazdus

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 19:41
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/36; G06F11/362; G06F11/3648; G06F11/3656

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 64 words
A microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, said in-circuit-emulator comprising: an ICEBRK pin, which when asserted for a predetermined minimum period of time, causes the microprocessor to immediately cease executing new instructions when the microprocessor transitions from said emulation mode to said interrogation mode.
Claim 2
Dependent Claim 64 words
A microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, said in-circuit-emulator comprising: an ICEBRK pin, which when asserted for a predetermined minimum period of time, causes the microprocessor to immediately cease executing new instructions when the microprocessor transitions from said emulation mode to said interrogation mode.
Claim 3
Dependent Claim 103 words
A microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, said in-circuit-emulator supporting a plurality of initialization modes and a plurality of control registers, said in-circuit-emulator comprising: an ICELOCK pin, which when asserted during said initialization mode, clears a first set of control registers in said in-circuit-emulator during initialization, wherein said ICELOCK pin when asserted also protects from being overwritten a second set of control registers when the in-circuit-emulator is engaged in said initialization mode, whereby the processor is configured for operation in said emulation mode.
Claim 4
Dependent Claim 103 words
A microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, said in-circuit-emulator supporting a plurality of initialization modes and a plurality of control registers, said in-circuit-emulator comprising: an ICELOCK pin, which when asserted during said initialization mode, clears a first set of control registers in said in-circuit-emulator during initialization, wherein said ICELOCK pin when asserted also protects from being overwritten a second set of control registers when the in-circuit-emulator is engaged in said initialization mode, whereby the processor is configured for operation in said emulation mode.
Claim 5
Dependent Claim 47 words
The microprocessor defined by claim 2 where said initialization is a software initialization and said in-circuit-emulator further comprises: a SFTRST bit which is adapted to cause the microprocessor to halt execution during said emulation mode and forces the microprocessor to enter said interrogation mode during software initialization.
Claim 6
Dependent Claim 96 words
A microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, said in-circuit-emulator comprising:: an address mark counter loaded to an initial value upon the occurrence of a first predetermined condition, wherein said address mark counter is updated every clock cycle of said microprocessor, provided that a second predetermined condition does not occur; an address mark generator coupled to said address mark counter which automatically issues an address mark trace message upon said address mark counter reaching a predetermined state.
Claim 7
Dependent Claim 96 words
A microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, said in-circuit-emulator comprising:: an address mark counter loaded to an initial value upon the occurrence of a first predetermined condition, wherein said address mark counter is updated every clock cycle of said microprocessor, provided that a second predetermined condition does not occur; an address mark generator coupled to said address mark counter which automatically issues an address mark trace message upon said address mark counter reaching a predetermined state.
Claim 8
Dependent Claim 40 words
The microprocessor defined by claim 4 wherein said in-circuit-emulator further comprises: an AMCTRL bit which is adapted to inhibit said address mark generator from issuing said address mark trace message even upon said address mark counter reaching said predetermined state.
Claim 9
Dependent Claim 64 words
A microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, said microprocessor for coupling to a host emulator, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, said in-circuit-emulator further comprising: a MSGFRM signal which indicates to the host emulator that a first byte of said trace message has been issued to the in-circuit emulator bus.
Claim 10
Dependent Claim 64 words
A microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, said microprocessor for coupling to a host emulator, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, said in-circuit-emulator further comprising: a MSGFRM signal which indicates to the host emulator that a first byte of said trace message has been issued to the in-circuit emulator bus.
Claim 11
Dependent Claim 73 words
In a microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, a method for controlling the operation of said in-circuit-emulator comprising the steps of: asserting an ICEBRK pin for a predetermined minimum period of time causing the microprocessor to immediately cease executing new instructions when the microprocessor transitions from said emulation mode to said interrogation mode.
Claim 12
Dependent Claim 73 words
In a microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, a method for controlling the operation of said in-circuit-emulator comprising the steps of: asserting an ICEBRK pin for a predetermined minimum period of time causing the microprocessor to immediately cease executing new instructions when the microprocessor transitions from said emulation mode to said interrogation mode.
Claim 13
Dependent Claim 103 words
In a microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, said in-circuit-emulator supporting a plurality of initialization modes and a plurality of control registers, a method for controlling the operation of said in-circuit-emulator comprising the steps of: asserting an ICELOCK pin during said initialization mode, clearing a first set of control registers in said in-circuit-emulator during initialization, protecting from being overwritten a second set of control registers when the in-circuit-emulator is engaged in said initialization mode configuring the microprocessor for operation in said emulation mode.
Claim 14
Dependent Claim 103 words
In a microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, said in-circuit-emulator supporting a plurality of initialization modes and a plurality of control registers, a method for controlling the operation of said in-circuit-emulator comprising the steps of: asserting an ICELOCK pin during said initialization mode, clearing a first set of control registers in said in-circuit-emulator during initialization, protecting from being overwritten a second set of control registers when the in-circuit-emulator is engaged in said initialization mode configuring the microprocessor for operation in said emulation mode.
Claim 15
Dependent Claim 47 words
The method defined by claim 8 where said initialization is a software initialization and said method further comprises the steps of: using a SFTRST bit to cause the microprocessor to halt execution during said emulation mode; forcing the microprocessor to enter said interrogation mode during software initialization.
Claim 16
Dependent Claim 98 words
In a microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, a method for controlling the operation of said in-circuit-emulator comprising the steps of: loading an address mark counter with an initial value upon the occurrence of a first predetermined condition, updating said address mark counter every clock cycle of said microprocessor, provided that a second predetermined condition does not occur; automatically issuing an address mark with an address mark trace message upon said address mark counter reaching a predetermined state.
Claim 17
Dependent Claim 98 words
In a microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, a method for controlling the operation of said in-circuit-emulator comprising the steps of: loading an address mark counter with an initial value upon the occurrence of a first predetermined condition, updating said address mark counter every clock cycle of said microprocessor, provided that a second predetermined condition does not occur; automatically issuing an address mark with an address mark trace message upon said address mark counter reaching a predetermined state.
Claim 18
Dependent Claim 38 words
The method defined by claim 10 further comprising the steps of: using an AMCTRL bit to inhibit said address mark generator from issuing said address mark trace message even upon said address mark counter reaching said predetermined state.
Claim 19
Dependent Claim 76 words
In a microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, said microprocessor for coupling to a host emulator, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, a method for controlling the operation of said in-circuit-emulator further comprising the steps of: generating a MSGFRM signal to indicate to the host emulator that a first byte of said trace message has been issued to the in-circuit emulator bus.
Claim 20
Dependent Claim 76 words
In a microprocessor with an in-circuit-emulator having an interrogation mode and an emulation mode, said microprocessor for coupling to a host emulator, wherein said microprocessor outputs a plurality of trace messages over an in-circuit emulator bus, a method for controlling the operation of said in-circuit-emulator further comprising the steps of: generating a MSGFRM signal to indicate to the host emulator that a first byte of said trace message has been issued to the in-circuit emulator bus.

References Cited (Backward Citations)

US5321828A Cited
US5357628A Cited
US5440747A Cited
US5515530A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-05-12 2000-11-11 2001-05-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-05-12 2004-11-11 2005-05-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-05-12 2008-11-11 2009-05-13 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag