Integrated circuit assembly incorporating an anisotropic elecctrically conductive layer

Claim 1

An integrated circuit assembly, comprising: (a) a dielectric substrate having first and second surfaces and a plurality of electrically conductive traces, wherein first terminal trace portions of said plurality of electrically conductive traces are arranged on the first surface of the dielectric substrate and second terminal trace portions of said plurality of electrically conductive traces are arranged on the second surface of the dielectric substrate, the first terminal trace portions being electrically connected to the second terminal trace portions of said electrically conductive traces, the second surface further including an array of contacts that are electrically connected to the second terminal trace portions; (b) an integrated circuit chip having a first surface having a plurality of input/output terminals thereon, the integrated circuit chip having a footprint that is substantially the same size as said dielectric substrate; and (c) an anisotropic electrically conductive layer interposed between said first surface of the dielectric substrate and said first surface of the integrated circuit chip for electrically connecting respective traces of said plurality of electrically conductive traces of said dielectric substrate with respective terminals of said plurality of input/output terminals of said integrated circuit chip, wherein said anisotropic electrically conductive layer provides a plurality of electrically conductive paths formed by a plurality of electrically conductive particles randomly dispersed within said anisotropic electrically conductive layer.