Patent US5625318A successfully refreshed from Google Patents.
US5625318A
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Differential amplifier having a double differential amplifier pair with interconnected control electrodes
Assignee: Alcatel Lucent NV
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Filing: 1995-10-10
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Granted: 1997-04-29
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Expires: 2015-10-10
Abstract
Abstract A tunable quadrature phase shifter including two branches each constituted by the cascade connection of a filter, an amplifier and a summing circuit, and two cross-connections constituted by amplifiers interconnecting the filter of one branch to the summing circuit of the opposite branch. An accurate 90 degrees phase shift between the two output signals is obtained by controlling the tail currents of the four amplifiers. The phase shifter used in mobile telecommunication transceivers may be easily and accurately tuned because the signals used in the summing circuits all have a similar amplitude. It is further adapted to operate with only a 3 Volt battery supply as used in wireless phones. The bandwidth of the amplifiers is increased by using double differential pair amplifiers which behave as cascode arrangements.
Inventors
- 👤 Joannes M. J. Sevenhans
- 👤 Eric Duvivier
- 👤 Daniel Sallaerts
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 11:12
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/02; H03H11/16; H03H11/22
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
302 words
A differential amplifier (DDPA) coupled to a tail current source and having a differential input (IN+, IN-) and a differential output (OUT+, OUT-), wherein said tail current source is a variable double tail current source having a first and second current branch each with a series connection of a respective bias transistor and a respective resistor, both bias transistors being simultaneously controlled by a control signal coupled to respective bases of respective bias transistors; and wherein said differential amplifier (DDPA) is a double differential pair amplifier having first (SRA, T2) and second (SRB, T3) branches each being connected between a power supply (VCC) and respectively to said first and second current branch, each of said first and second branches having a respective series connection with a respective load resistor (SRA, SRB) and a respective first transistor (T2, T3) and having respective control electrodes that are interconnected, said double differential pair amplifier (DDPA) also having third (T1) and fourth (T4) branches each being connected between said power supply (VCC) and respectively to said first (SRA, T2) and second (SRB, T3) current branches, each of said third (T1) and fourth (T4) branch having a corresponding second transistor (T1, T4) with a corresponding control electrode that constitutes an associated differential input (IN+, IN-) of said double differential pair amplifier (DDPA), junction points of respective load resistors (SRA, SRB) with respective first transistors (T2, T3) constituting an associated differential output (OUT+, OUT-) of said double differential pair amplifier (DDPA), and the respective control electrodes of said respective first transistors (T2, T3) being connected via a respective second resistor (R) to corresponding control electrodes of corresponding second transistors (T1, T4) and also being connected via a respective capacitor (C) to the junction points of the respective load resistors (SRA, SRB) with said respective first transistors (T2, T3).
Claim 2
Dependent Claim
302 words
A differential amplifier (DDPA) coupled to a tail current source and having a differential input (IN+, IN-) and a differential output (OUT+, OUT-), wherein said tail current source is a variable double tail current source having a first and second current branch each with a series connection of a respective bias transistor and a respective resistor, both bias transistors being simultaneously controlled by a control signal coupled to respective bases of respective bias transistors; and wherein said differential amplifier (DDPA) is a double differential pair amplifier having first (SRA, T2) and second (SRB, T3) branches each being connected between a power supply (VCC) and respectively to said first and second current branch, each of said first and second branches having a respective series connection with a respective load resistor (SRA, SRB) and a respective first transistor (T2, T3) and having respective control electrodes that are interconnected, said double differential pair amplifier (DDPA) also having third (T1) and fourth (T4) branches each being connected between said power supply (VCC) and respectively to said first (SRA, T2) and second (SRB, T3) current branches, each of said third (T1) and fourth (T4) branch having a corresponding second transistor (T1, T4) with a corresponding control electrode that constitutes an associated differential input (IN+, IN-) of said double differential pair amplifier (DDPA), junction points of respective load resistors (SRA, SRB) with respective first transistors (T2, T3) constituting an associated differential output (OUT+, OUT-) of said double differential pair amplifier (DDPA), and the respective control electrodes of said respective first transistors (T2, T3) being connected via a respective second resistor (R) to corresponding control electrodes of corresponding second transistors (T1, T4) and also being connected via a respective capacitor (C) to the junction points of the respective load resistors (SRA, SRB) with said respective first transistors (T2, T3).
Claim 3
Dependent Claim
16 words
A differential amplifier according to claim 1, characterized in that all said transistors are bipolar transistors.
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| 3.5 Years (Year 4) | 2000-04-28 | 2000-10-28 | 2001-04-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-04-28 | 2004-10-28 | 2005-04-29 | $3760.00 | Window Closed / Lapsed |
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